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Re: [PATCH] Optimize zero_extend into paradoxical subreg
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Roger Sayle <roger at eyesopen dot com>
- Cc: gcc-patches at gcc dot gnu dot org, Richard dot Earnshaw at arm dot com
- Date: Sat, 28 Sep 2002 17:29:17 +0100
- Subject: Re: [PATCH] Optimize zero_extend into paradoxical subreg
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
> A recent discussion on GCC's semantics for paradoxical subregs on
> this list suggested there was a need for additional optimizations
> to optimize their use. In that thread I suggested that simplify_rtx
> could eliminate explicit zero_extension and sign_extension operations
> on targets with LOAD_EXTEND_OP when the extension operand was a MEM.
> The patch below implements this suggestion.
> This patch has been tested by a complete "make bootstap" and "make
> -k check", all languages except Ada and treelang, on i686-pc-linux-gnu
> (which doesn't define LOAD_EXTEND_OP and WORD_REGISTER_OPERATIONS) and
> on hppa2.0w-hp-hpux11.00 (which does). There are no new regressions
> on either target.
> Now the caveat. I can't demonstrate this is useful. I've stepped
> through several examples on HPUX to convince myself the code triggers
> and returns the intended result. However, in the examples I used the
> optimized RTL was not chosen by combine, so the resulting .s output
> didn't change. By corollary, I don't have a test case either. But
> the theory is sound, so I thought I'd post the patch in case other
> platforms, such as powerpc, or more complex code have better luck.
> Ok for the gcc-3_4-basic-improvements-branch?
I'm not convinced this is a good idea. Surely it would be better to go
the other way -- ie translate (subreg:M1 (mem:M2) 0) into zero_ or
sign_extend if M1 is wider than M2.
There's a general principle for RTL that it's better to be explicit about
an operation than rely on implicit meaning -- your patch seems to go