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[PATCH] ARM: missing CC clobber in sign_extract_onebit, not_signextract_onebit
- From: jeroen dobbelaere <jeroen dot dobbelaere at acunia dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Fri, 20 Sep 2002 09:05:22 +0200
- Subject: [PATCH] ARM: missing CC clobber in sign_extract_onebit, not_signextract_onebit
- Organization: ACUNIA
After verifying other constructs similar to
<http://gcc.gnu.org/ml/gcc-patches/2002-09/msg01093.html>
I have found two other cases where the condition code was not clobbered.
This seems to be the case for at least :
head, 3.2-branch, 3.0-branch
Greetings,
--
Jeroen Dobbelaere
Embedded Software Engineer
ACUNIA Embedded Solutions
http://www.acunia.com/aes
2002-09-19 Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com>
* config/arm/arm.md (sign_extract_onebit, not_signextract_onebit):
Add clobber of the condition code register.
--- gcc-3.0.4/gcc/config/arm/arm.md Thu Sep 19 13:56:48 2002
+++ gcc/gcc/config/arm/arm.md Thu Sep 19 13:59:05 2002
@@ -8994,7 +8994,8 @@
[(set (match_operand:SI 0 "s_register_operand" "=r")
(sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
(const_int 1)
- (match_operand:SI 2 "const_int_operand" "n")))]
+ (match_operand:SI 2 "const_int_operand" "n")))
+ (clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
"*
operands[2] = GEN_INT (1 << INTVAL (operands[2]));
@@ -9010,7 +9011,8 @@
(not:SI
(sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
(const_int 1)
- (match_operand:SI 2 "const_int_operand" "n"))))]
+ (match_operand:SI 2 "const_int_operand" "n"))))
+ (clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
"*
operands[2] = GEN_INT (1 << INTVAL (operands[2]));