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[patch] gcc: Follow spelling conventions.
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sun, 15 Sep 2002 14:25:19 -0400 (EDT)
- Subject: [patch] gcc: Follow spelling conventions.
Hi,
Attached is a patch to follow spelling conventions. Committed as
obvious.
Kazu Hirata
2002-09-15 Kazu Hirata <kazu@cs.umass.edu>
* ChangeLog: Follow spelling conventions.
* ChangeLog.0: Likewise.
* ChangeLog.1: Likewise.
* ChangeLog.2: Likewise.
* ChangeLog.3: Likewise.
* ChangeLog.4: Likewise.
* ChangeLog.5: Likewise.
* ChangeLog.6: Likewise.
* FSFChangeLog.10: Likewise.
* FSFChangeLog.11: Likewise.
* c-common.c: Likewise.
* c-common.h: Likewise.
* c-format.c: Likewise.
* c-opts.c: Likewise.
* cpplib.c: Likewise.
* langhooks.h: Likewise.
* real.c: Likewise.
* reg-stack.c: Likewise.
* toplev.c: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/arm.md: Likewise.
* config/arm/linux-gas.h: Likewise.
* config/arm/netbsd.h: Likewise.
* config/c4x/c4x.c: Likewise.
* config/c4x/c4x.h: Likewise.
* config/c4x/c4x.md: Likewise.
* config/c4x/libgcc.S: Likewise.
* config/fr30/fr30.md: Likewise.
* config/frv/frv.md: Likewise.
* config/ia64/ia64.md: Likewise.
* config/mips/mips.h: Likewise.
* config/mn10300/mn10300.c: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/v850/v850.md: Likewise.
* doc/extend.texi: Likewise.
* doc/invoke.texi: Likewise.
* doc/md.texi: Likewise.
Index: ChangeLog
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog,v
retrieving revision 1.15426
diff -u -r1.15426 ChangeLog
--- ChangeLog 15 Sep 2002 12:03:39 -0000 1.15426
+++ ChangeLog 15 Sep 2002 18:02:28 -0000
@@ -9813,7 +9813,7 @@
(gt_ggc_m_tree_node): Likewise.
* varasm.c (copy_constant): Call expand_constant if we hit
- something we can't recognise.
+ something we can't recognize.
* ggc-common.c (ggc_mark_rtvec_children): Delete.
(ggc_mark_rtx_children): Use generic name for ggc_mark_rtvec.
@@ -24895,7 +24895,7 @@
* cpphash.c (_cpp_init_hashtable): Similarly.
* cppinit.c (cpp_create_reader): Default the signed_char flag.
(init_builtins): Define __CHAR_UNSIGNED__ appropriately.
- (COMMAND_LINE_OPTIONS): Recognise -f{un,}signed-char.
+ (COMMAND_LINE_OPTIONS): Recognize -f{un,}signed-char.
(cpp_handle_option): Handle the new options.
* cpplex.c (cpp_interpret_charconst): Use new flag.
* cpplib.h (struct cpp_options): New member signed_char.
Index: ChangeLog.0
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog.0,v
retrieving revision 1.13
diff -u -r1.13 ChangeLog.0
--- ChangeLog.0 14 Sep 2002 15:51:40 -0000 1.13
+++ ChangeLog.0 15 Sep 2002 18:02:41 -0000
@@ -12000,7 +12000,7 @@
EXCEPTION_SECTION, mark the start of the frame info with a
collectible tag.
* collect2.c (frame_tables): New list.
- (is_ctor_dtor): Recognise frame entries.
+ (is_ctor_dtor): Recognize frame entries.
(scan_prog_file): Likewise.
(main): Pass -fno-exceptions to sub-compile. Also do collection
if there are any frame entries.
Index: ChangeLog.1
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog.1,v
retrieving revision 1.6
diff -u -r1.6 ChangeLog.1
--- ChangeLog.1 28 Oct 2001 20:08:50 -0000 1.6
+++ ChangeLog.1 15 Sep 2002 18:02:58 -0000
@@ -469,7 +469,7 @@
(ASSEMBLER_DIALECT): Define.
(CONDITIONAL_REGISTER_USAGE): Rename floating point registers if
required for the UNIX assembler.
- (ASM_OUTPUT_INT): Remove. The compiler will synthesise it.
+ (ASM_OUTPUT_INT): Remove. The compiler will synthesize it.
(ASM_OUTPUT_ADDR_VEC_PROLOGUE): Remove.
(ASM_OPEN_PAREN, ASM_CLOSE_PAREN): Change to "[" and "]".
(TRAMPOLINE_TEMPLATE): Use ASM_OUTPUT_SHORT.
@@ -4454,7 +4454,7 @@
StrongARM.
(arm_is_6_or_7): New variable: true iff the target processor is an
ARM6 or and ARM7.
- (arm_select): Fields reorganised.
+ (arm_select): Fields reorganized.
(struct processors): processor_type field removed.
(all_procs): Remove.
(all_cores): New array: Definitions of all known ARM cpu cores.
Index: ChangeLog.2
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog.2,v
retrieving revision 1.12
diff -u -r1.12 ChangeLog.2
--- ChangeLog.2 14 Sep 2002 15:51:40 -0000 1.12
+++ ChangeLog.2 15 Sep 2002 18:03:13 -0000
@@ -2434,10 +2434,10 @@
1999-11-18 Nick Clifton <nickc@cygnus.com>
- * toplev.c (main): Correctly detect an unrecognised option.
+ * toplev.c (main): Correctly detect an unrecognized option.
* cppinit.c (cpp_handle_option): Do not claim to have consumed
- a -f option if it has not been recognised.
+ a -f option if it has not been recognized.
Thu Nov 18 00:59:11 1999 Michael Gschwind <mikeg@alagoas.watson.ibm.com>
@@ -4782,7 +4782,7 @@
Tue Oct 19 14:01:34 1999 Nick Clifton <nickc@cygnus.com>
* toplev.c (main): Do not generate an error message if an
- unrecognised command line switch is recognisable by another
+ unrecognized command line switch is recognisable by another
language. If extra_warnings are enabled, then generate a
warning message instead.
@@ -4960,7 +4960,7 @@
Sat Oct 16 13:37:46 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
- * config/c4x/c4x.md (movstrqi_small): Utilise parallel move
+ * config/c4x/c4x.md (movstrqi_small): Utilize parallel move
instructions.
Sat Oct 16 13:26:47 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
@@ -8316,7 +8316,7 @@
* cppexp.c (cpp_lex): Handle `defined (xxx)' for poisoned xxx.
Include cpphash.h.
* cpphash.c (special_symbol): Handle plain `xxx' for poisoned xxx.
- * cpplib.c (do_define): Generalise to handle poisoned definitions,
+ * cpplib.c (do_define): Generalize to handle poisoned definitions,
redefining poisoned identifiers, etc.
(do_undef): Don't allow poisoned identifiers to be undefined.
(do_pragma): Add #pragma poison.
@@ -8325,7 +8325,7 @@
* cccp.c: Add T_POISON node type.
(special_symbol): Handle `defined(xxx)' and plain `xxx' for
poisoned xxx.
- (do_define): Generalise to handle poisoned definitions,
+ (do_define): Generalize to handle poisoned definitions,
redefining poisoned identifiers, etc.
(do_undef): Don't allow poisoned identifiers to be undefined.
(do_pragma): Add #pragma poison.
@@ -14093,7 +14093,7 @@
Wed Jun 2 08:42:55 1999 Nick Clifton <nickc@cygnus.com>
- * config/arm/tcoff.h (USER_LABEL_PREFIX): Synchronise with
+ * config/arm/tcoff.h (USER_LABEL_PREFIX): Synchronize with
definition in config/arm/coff.h
* config/arm/coff.h: Add comment about USER_LABEL_PREFIX.
Index: ChangeLog.3
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog.3,v
retrieving revision 1.11
diff -u -r1.11 ChangeLog.3
--- ChangeLog.3 14 Sep 2002 15:51:40 -0000 1.11
+++ ChangeLog.3 15 Sep 2002 18:03:30 -0000
@@ -10805,7 +10805,7 @@
* gcc.c (do_spec_1): Catch the case where %* is used in a
substitution pattern, but it has not been initialized.
- Issue a meaningful error message if an unrecognised operator
+ Issue a meaningful error message if an unrecognized operator
is encountered in a spec string.
2000-03-14 Richard Earnshaw <rearnsha@arm.com>
Index: ChangeLog.4
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog.4,v
retrieving revision 1.11
diff -u -r1.11 ChangeLog.4
--- ChangeLog.4 14 Sep 2002 15:51:40 -0000 1.11
+++ ChangeLog.4 15 Sep 2002 18:03:46 -0000
@@ -142,7 +142,7 @@
* c-parse.in (select_or_iter_stmt): Use truthvalue_conversion
on the condition of a FOR statement, so that it gets typechecked
- and optimised.
+ and optimized.
2000-12-29 Alexandre Oliva <aoliva@redhat.com>
Index: ChangeLog.5
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog.5,v
retrieving revision 1.10
diff -u -r1.10 ChangeLog.5
--- ChangeLog.5 14 Sep 2002 15:51:41 -0000 1.10
+++ ChangeLog.5 15 Sep 2002 18:04:01 -0000
@@ -11536,7 +11536,7 @@
2001-01-27 Michael Sokolov <msokolov@ivan.Harhan.ORG>
- * fixproto: Correctly install synthesised unistd.h and stdlib.h when
+ * fixproto: Correctly install synthesized unistd.h and stdlib.h when
they didn't need fixing.
2001-01-27 Janis Johnson <janis@us.ibm.com>
@@ -11922,7 +11922,7 @@
* config/avr/avr.c (ret_cond_branch): New argument (reverse) added.
If REVERSE nonzero then condition code in X must be reversed.
- (encode_section_info): Optimise if/else.
+ (encode_section_info): Optimize if/else.
(avr_function_value): Fix formatting.
* config/avr/avr.md (branch): Call to ret_cond_branch changed.
Index: ChangeLog.6
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog.6,v
retrieving revision 1.5
diff -u -r1.5 ChangeLog.6
--- ChangeLog.6 14 Sep 2002 15:51:41 -0000 1.5
+++ ChangeLog.6 15 Sep 2002 18:04:21 -0000
@@ -995,7 +995,7 @@
Mon Dec 17 17:57:05 CET 2001 Jan Hubicka <jh@suse.cz>
- * Makefile.in (cfgcleanup.o): Add cselib.h dependancy.
+ * Makefile.in (cfgcleanup.o): Add cselib.h dependency.
* basic-block.h (CLEANUP_THREADING): New constant.
* cfgcleanup.c: Include cselib.h
(thread_jump, mark_effect): New functions.
Index: FSFChangeLog.10
===================================================================
RCS file: /cvs/gcc/gcc/gcc/FSFChangeLog.10,v
retrieving revision 1.8
diff -u -r1.8 FSFChangeLog.10
--- FSFChangeLog.10 23 Nov 2001 02:05:08 -0000 1.8
+++ FSFChangeLog.10 15 Sep 2002 18:04:31 -0000
@@ -8552,7 +8552,7 @@
Delete the no_live_regs shortcut to save space.
Use stackentry state to determine filled registers.
(replace_reg): Accept COMPLEX_FLOAT as well.
- (move_for_stack_reg): Optimise away some pointer dereferencing.
+ (move_for_stack_reg): Optimize away some pointer dereferencing.
(subst_stack_regs): Make sure the stack is in the right order
and of the right size for register passing.
(goto_block_pat): Make sure the stack is in the right order
Index: FSFChangeLog.11
===================================================================
RCS file: /cvs/gcc/gcc/gcc/FSFChangeLog.11,v
retrieving revision 1.6
diff -u -r1.6 FSFChangeLog.11
--- FSFChangeLog.11 4 Nov 2001 02:51:20 -0000 1.6
+++ FSFChangeLog.11 15 Sep 2002 18:04:47 -0000
@@ -2636,7 +2636,7 @@
EXCEPTION_SECTION, mark the start of the frame info with a
collectable tag.
* collect2.c (frame_tables): New list.
- (is_ctor_dtor): Recognise frame entries.
+ (is_ctor_dtor): Recognize frame entries.
(scan_prog_file): Likewise.
(main): Pass -fno-exceptions to sub-compile. Also do collection
if there are any frame entries.
@@ -3948,7 +3948,7 @@
Sun Aug 3 21:54:51 1997 Nick Burrett <n.a.burrett@btinternet.com>
- * cpplib.c (cpp_start_read): Recognise suffixes 'cp' and 'c++'.
+ * cpplib.c (cpp_start_read): Recognize suffixes 'cp' and 'c++'.
Sun Aug 3 19:18:27 1997 Ralf Baechle <ralf@uni-koblenz.de>
Index: c-common.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/c-common.c,v
retrieving revision 1.373
diff -u -r1.373 c-common.c
--- c-common.c 8 Sep 2002 12:47:25 -0000 1.373
+++ c-common.c 15 Sep 2002 18:04:53 -0000
@@ -303,7 +303,7 @@
int warn_conversion;
-/* Warn about #pragma directives that are not recognised. */
+/* Warn about #pragma directives that are not recognized. */
int warn_unknown_pragmas; /* Tri state variable. */
@@ -4947,7 +4947,7 @@
sprintf (name, "__%s_DIG__", name_prefix);
builtin_define_with_int_value (name, dig);
- /* The minimum negative int x such that b**(x-1) is a normalised float. */
+ /* The minimum negative int x such that b**(x-1) is a normalized float. */
sprintf (name, "__%s_MIN_EXP__", name_prefix);
sprintf (buf, "(%d)", min_exp);
builtin_define_with_value (name, buf, 0);
Index: c-common.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/c-common.h,v
retrieving revision 1.158
diff -u -r1.158 c-common.h
--- c-common.h 8 Sep 2002 12:47:26 -0000 1.158
+++ c-common.h 15 Sep 2002 18:04:54 -0000
@@ -477,7 +477,7 @@
extern int warn_conversion;
-/* Warn about #pragma directives that are not recognised. */
+/* Warn about #pragma directives that are not recognized. */
extern int warn_unknown_pragmas; /* Tri state variable. */
Index: c-format.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/c-format.c,v
retrieving revision 1.27
diff -u -r1.27 c-format.c
--- c-format.c 1 Aug 2002 06:20:31 -0000 1.27
+++ c-format.c 15 Sep 2002 18:04:57 -0000
@@ -286,7 +286,7 @@
/* Check a call to a format function against a parameter list. */
-/* The meaningfully distinct length modifiers for format checking recognised
+/* The meaningfully distinct length modifiers for format checking recognized
by GCC. */
enum format_lengths
{
Index: c-opts.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/c-opts.c,v
retrieving revision 1.17
diff -u -r1.17 c-opts.c
--- c-opts.c 27 Aug 2002 22:14:44 -0000 1.17
+++ c-opts.c 15 Sep 2002 18:04:58 -0000
@@ -1199,7 +1199,7 @@
break;
case OPT_ftabstop:
- /* Don't recognise -fno-tabstop=. */
+ /* Don't recognize -fno-tabstop=. */
if (!on)
return 0;
@@ -1640,7 +1640,7 @@
}
/* Args to -d specify what to dump. Silently ignore
- unrecognised options; they may be aimed at toplev.c. */
+ unrecognized options; they may be aimed at toplev.c. */
static void
handle_OPT_d (arg)
const char *arg;
Index: cpplib.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/cpplib.c,v
retrieving revision 1.322
diff -u -r1.322 cpplib.c
--- cpplib.c 3 Sep 2002 21:55:37 -0000 1.322
+++ cpplib.c 15 Sep 2002 18:05:05 -0000
@@ -367,7 +367,7 @@
if (dname->val.node->directive_index)
dir = &dtable[dname->val.node->directive_index - 1];
}
- /* We do not recognise the # followed by a number extension in
+ /* We do not recognize the # followed by a number extension in
assembler code. */
else if (dname->type == CPP_NUMBER && CPP_OPTION (pfile, lang) != CLK_ASM)
{
@@ -1984,7 +1984,7 @@
}
}
-/* Enter all recognised directives in the hash table. */
+/* Enter all recognized directives in the hash table. */
void
_cpp_init_directives (pfile)
cpp_reader *pfile;
Index: langhooks.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/langhooks.h,v
retrieving revision 1.45
diff -u -r1.45 langhooks.h
--- langhooks.h 22 Aug 2002 00:42:40 -0000 1.45
+++ langhooks.h 15 Sep 2002 18:05:10 -0000
@@ -186,7 +186,7 @@
/* Function called with an option vector as argument, to decode a
single option (typically starting with -f or -W or +). It should
return the number of command-line arguments it uses if it handles
- the option, or 0 and not complain if it does not recognise the
+ the option, or 0 and not complain if it does not recognize the
option. If this function returns a negative number, then its
absolute value is the number of command-line arguments used, but,
in addition, no language-independent option processing should be
Index: real.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/real.c,v
retrieving revision 1.80
diff -u -r1.80 real.c
--- real.c 8 Sep 2002 12:47:27 -0000 1.80
+++ real.c 15 Sep 2002 18:05:14 -0000
@@ -5728,7 +5728,7 @@
if (y[M] == 0 && y[M+1] == 0 && y[M+2] == 0 && y[M+3] == 0)
y[0] = y[E] = 0;
else
- y[E] -= 5 + enormlz (y); /* now normalise the mantissa */
+ y[E] -= 5 + enormlz (y); /* now normalize the mantissa */
/* handle change in RADIX */
emovo (y, e);
}
Index: reg-stack.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/reg-stack.c,v
retrieving revision 1.112
diff -u -r1.112 reg-stack.c
--- reg-stack.c 23 Jun 2002 05:30:04 -0000 1.112
+++ reg-stack.c 15 Sep 2002 18:05:17 -0000
@@ -353,7 +353,7 @@
return NULL_RTX;
}
-/* Reorganise the stack into ascending numbers,
+/* Reorganize the stack into ascending numbers,
after this insn. */
static void
Index: toplev.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/toplev.c,v
retrieving revision 1.672
diff -u -r1.672 toplev.c
--- toplev.c 12 Sep 2002 22:34:07 -0000 1.672
+++ toplev.c 15 Sep 2002 18:05:21 -0000
@@ -4008,7 +4008,7 @@
else if (!strcmp (arg, "no-stack-limit"))
stack_limit_rtx = NULL_RTX;
else if (!strcmp (arg, "preprocessed"))
- /* Recognise this switch but do nothing. This prevents warnings
+ /* Recognize this switch but do nothing. This prevents warnings
about an unrecognized switch if cpplib has not been linked in. */
;
else
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.229
diff -u -r1.229 arm.c
--- config/arm/arm.c 14 Sep 2002 15:51:42 -0000 1.229
+++ config/arm/arm.c 15 Sep 2002 18:05:31 -0000
@@ -831,7 +831,7 @@
if (streq (arg, ptr->arg))
return ptr->return_value;
- /* An unrecognised interrupt type. */
+ /* An unrecognized interrupt type. */
return ARM_FT_UNKNOWN;
}
@@ -1034,7 +1034,7 @@
&& REGNO (target) != REGNO (source)))
{
/* After arm_reorg has been called, we can't fix up expensive
- constants by pushing them into memory so we must synthesise
+ constants by pushing them into memory so we must synthesize
them in-line, regardless of the cost. This is only likely to
be more costly on chips that have load delay slots and we are
compiling without running the scheduler (so no splitting
@@ -7859,7 +7859,7 @@
num_dwarf_regs--;
/* For the body of the insn we are going to generate an UNSPEC in
- parallel with several USEs. This allows the insn to be recognised
+ parallel with several USEs. This allows the insn to be recognized
by the push_multi pattern in the arm.md file. The insn looks
something like this:
Index: config/arm/arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.107
diff -u -r1.107 arm.md
--- config/arm/arm.md 14 Sep 2002 15:51:43 -0000 1.107
+++ config/arm/arm.md 15 Sep 2002 18:05:39 -0000
@@ -3913,7 +3913,7 @@
;; DONE;
;;}")
-;; Recognise garbage generated above.
+;; Recognize garbage generated above.
;;(define_insn ""
;; [(set (match_operand:TI 0 "general_operand" "=r,r,r,<,>,m")
@@ -4682,7 +4682,7 @@
"
)
-;; Pattern to recognise insn generated default case above
+;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
(match_operand:HI 1 "general_operand" "rI,K,r,m"))]
Index: config/arm/linux-gas.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/linux-gas.h,v
retrieving revision 1.8
diff -u -r1.8 linux-gas.h
--- config/arm/linux-gas.h 14 Sep 2001 10:19:30 -0000 1.8
+++ config/arm/linux-gas.h 15 Sep 2002 18:05:39 -0000
@@ -45,7 +45,7 @@
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-/* Emit code to set up a trampoline and synchronise the caches. */
+/* Emit code to set up a trampoline and synchronize the caches. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
Index: config/arm/netbsd.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/netbsd.h,v
retrieving revision 1.20
diff -u -r1.20 netbsd.h
--- config/arm/netbsd.h 8 Sep 2002 16:06:18 -0000 1.20
+++ config/arm/netbsd.h 15 Sep 2002 18:05:40 -0000
@@ -148,7 +148,7 @@
#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
-/* Emit code to set up a trampoline and synchronise the caches. */
+/* Emit code to set up a trampoline and synchronize the caches. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
Index: config/c4x/c4x.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.c,v
retrieving revision 1.111
diff -u -r1.111 c4x.c
--- config/c4x/c4x.c 4 Sep 2002 16:24:20 -0000 1.111
+++ config/c4x/c4x.c 15 Sep 2002 18:05:43 -0000
@@ -1469,7 +1469,7 @@
switch (code)
{
/* Register indirect with auto increment/decrement. We don't
- allow SP here---push_operand should recognise an operand
+ allow SP here---push_operand should recognize an operand
being pushed on the stack. */
case PRE_DEC:
Index: config/c4x/c4x.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.h,v
retrieving revision 1.115
diff -u -r1.115 c4x.h
--- config/c4x/c4x.h 29 Aug 2002 21:40:10 -0000 1.115
+++ config/c4x/c4x.h 15 Sep 2002 18:05:45 -0000
@@ -1470,7 +1470,7 @@
Note that we return, rather than break so that rtx_cost doesn't
include CONST_COSTS otherwise expand_mult will think that it is
- cheaper to synthesise a multiply rather than to use a multiply
+ cheaper to synthesize a multiply rather than to use a multiply
instruction. I think this is because the algorithm synth_mult
doesn't take into account the loading of the operands, whereas the
calculation of mult_cost does.
Index: config/c4x/c4x.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.md,v
retrieving revision 1.71
diff -u -r1.71 c4x.md
--- config/c4x/c4x.md 13 May 2002 04:50:13 -0000 1.71
+++ config/c4x/c4x.md 15 Sep 2002 18:05:53 -0000
@@ -29,7 +29,7 @@
; for QImode and Pmode, whether Pmode was QImode or PQImode.
; For addresses we wouldn't have to have a clobber of the CC
; associated with each insn and we could use MPYI in address
-; calculations without having to synthesise a proper 32 bit multiply.
+; calculations without having to synthesize a proper 32 bit multiply.
; Additional C30/C40 instructions not coded:
; CALLcond, IACK, IDLE, LDE, LDFI, LDII, LDM, NORM, RETIcond
@@ -1360,7 +1360,7 @@
; If one of the operands is not a register, then we should
; emit two insns, using a scratch register. This will produce
; better code in loops if the source operand is invariant, since
-; the source reload can be optimised out. During reload we cannot
+; the source reload can be optimized out. During reload we cannot
; use change_address or force_reg which will allocate new pseudo regs.
; Unlike most other insns, the move insns can't be split with
@@ -2076,7 +2076,7 @@
{
if (GET_CODE (operands[2]) == CONST_INT)
{
- /* Let GCC try to synthesise the multiplication using shifts
+ /* Let GCC try to synthesize the multiplication using shifts
and adds. In most cases this will be more profitable than
using the C3x MPYI. */
FAIL;
@@ -3410,7 +3410,7 @@
; If one of the operands is not a register, then we should
; emit two insns, using a scratch register. This will produce
; better code in loops if the source operand is invariant, since
-; the source reload can be optimised out. During reload we cannot
+; the source reload can be optimized out. During reload we cannot
; use change_address or force_reg.
(define_expand "movqf"
[(set (match_operand:QF 0 "src_operand" "")
@@ -5317,7 +5317,7 @@
; Note we have to emit a dbu instruction if there are no delay slots
; to fill.
; Also note that GCC will try to reverse a loop to see if it can
-; utilise this instruction. However, if there are more than one
+; utilize this instruction. However, if there are more than one
; memory reference in the loop, it cannot guarantee that reversing
; the loop will work :( (see check_dbra_loop() in loop.c)
; Note that the C3x only decrements the 24 LSBs of the address register
@@ -5629,7 +5629,7 @@
; The current low overhead looping code is naff and is not failsafe
; If you want RTPB instructions to be generated, apply the patches
-; from www.elec.canterbury.ac.nz/c4x. This will utilise the
+; from www.elec.canterbury.ac.nz/c4x. This will utilize the
; doloop_begin and doloop_end patterns in this MD.
(define_expand "decrement_and_branch_on_count"
[(parallel [(set (pc)
@@ -7315,7 +7315,7 @@
; The following two peepholes remove an unecessary load
; often found at the end of a function. These peepholes
-; could be generalised to other binary operators. They shouldn't
+; could be generalized to other binary operators. They shouldn't
; be required if we run a post reload mop-up pass.
(define_peephole
[(parallel [(set (match_operand:QF 0 "ext_reg_operand" "")
Index: config/c4x/libgcc.S
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/libgcc.S,v
retrieving revision 1.10
diff -u -r1.10 libgcc.S
--- config/c4x/libgcc.S 9 Dec 2001 20:13:07 -0000 1.10
+++ config/c4x/libgcc.S 15 Sep 2002 18:05:53 -0000
@@ -48,7 +48,7 @@
;
; r[i + 1] = r[i] * (2.0 - v * r[i])
;
-; The normalised error e[i] at the ith iteration is
+; The normalized error e[i] at the ith iteration is
;
; e[i] = (r - r[i]) / r = (1 / v - r[i]) * v = (1 - v * r[i])
;
Index: config/fr30/fr30.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.md,v
retrieving revision 1.14
diff -u -r1.14 fr30.md
--- config/fr30/fr30.md 29 May 2002 18:05:08 -0000 1.14
+++ config/fr30/fr30.md 15 Sep 2002 18:05:55 -0000
@@ -521,7 +521,7 @@
;;{{{ Floating Point Moves
;; Note - Patterns for SF mode moves are compulsory, but
-;; patterns for DF are optional, as GCC can synthesise them.
+;; patterns for DF are optional, as GCC can synthesize them.
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")
Index: config/frv/frv.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.md,v
retrieving revision 1.1
diff -u -r1.1 frv.md
--- config/frv/frv.md 4 Aug 2002 19:37:03 -0000 1.1
+++ config/frv/frv.md 15 Sep 2002 18:06:01 -0000
@@ -1607,7 +1607,7 @@
;; Floating Point Moves
;;
;; Note - Patterns for SF mode moves are compulsory, but
-;; patterns for DF are optional, as GCC can synthesise them.
+;; patterns for DF are optional, as GCC can synthesize them.
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")
@@ -2258,7 +2258,7 @@
;; Signed conversions from a smaller integer to a larger integer
;;
;; These operations are optional. If they are not
-;; present GCC will synthesise them for itself
+;; present GCC will synthesize them for itself
;; Even though frv does not provide these instructions, we define them
;; to allow load + sign extend to be collapsed together
(define_insn "extendqihi2"
Index: config/ia64/ia64.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.md,v
retrieving revision 1.90
diff -u -r1.90 ia64.md
--- config/ia64/ia64.md 16 Jul 2002 16:07:13 -0000 1.90
+++ config/ia64/ia64.md 15 Sep 2002 18:06:07 -0000
@@ -766,7 +766,7 @@
;; Floating Point Moves
;;
;; Note - Patterns for SF mode moves are compulsory, but
-;; patterns for DF are optional, as GCC can synthesise them.
+;; patterns for DF are optional, as GCC can synthesize them.
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")
Index: config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.216
diff -u -r1.216 mips.h
--- config/mips/mips.h 29 Aug 2002 21:40:15 -0000 1.216
+++ config/mips/mips.h 15 Sep 2002 18:06:12 -0000
@@ -123,7 +123,7 @@
BLOCK_MOVE_LAST /* generate just the last store */
};
-/* Information about one recognised processor. Defined here for the
+/* Information about one recognized processor. Defined here for the
benefit of TARGET_CPU_CPP_BUILTINS. */
struct mips_cpu_info {
/* The 'canonical' name of the processor as far as GCC is concerned.
Index: config/mn10300/mn10300.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mn10300/mn10300.c,v
retrieving revision 1.44
diff -u -r1.44 mn10300.c
--- config/mn10300/mn10300.c 16 Jul 2002 20:59:02 -0000 1.44
+++ config/mn10300/mn10300.c 15 Sep 2002 18:06:13 -0000
@@ -647,7 +647,7 @@
}
}
-/* Recognise the PARALLEL rtx generated by mn10300_gen_multiple_store().
+/* Recognize the PARALLEL rtx generated by mn10300_gen_multiple_store().
This function is for MATCH_PARALLEL and so assumes OP is known to be
parallel. If OP is a multiple store, return a mask indicating which
registers it saves. Return 0 otherwise. */
Index: config/stormy16/stormy16.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/stormy16/stormy16.c,v
retrieving revision 1.25
diff -u -r1.25 stormy16.c
--- config/stormy16/stormy16.c 16 Jul 2002 20:59:07 -0000 1.25
+++ config/stormy16/stormy16.c 15 Sep 2002 18:06:15 -0000
@@ -476,7 +476,7 @@
return NO_REGS;
}
-/* Recognise a PLUS that needs the carry register. */
+/* Recognize a PLUS that needs the carry register. */
int
xstormy16_carry_plus_operand (x, mode)
rtx x;
Index: config/v850/v850.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/v850/v850.md,v
retrieving revision 1.19
diff -u -r1.19 v850.md
--- config/v850/v850.md 29 Aug 2002 09:50:20 -0000 1.19
+++ config/v850/v850.md 15 Sep 2002 18:06:17 -0000
@@ -851,7 +851,7 @@
;; ??? This is very ugly. The right way to do this is to modify cmpsi so
;; that it doesn't emit RTL, and then modify the bcc/scc patterns so that
;; they emit RTL for the compare instruction. Unfortunately, this requires
-;; lots of changes that will be hard to sanitise. So for now, cmpsi still
+;; lots of changes that will be hard to sanitize. So for now, cmpsi still
;; emits RTL, and I get the compare operands here from the previous insn.
(define_expand "movsicc"
Index: doc/extend.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/extend.texi,v
retrieving revision 1.98
diff -u -r1.98 extend.texi
--- doc/extend.texi 9 Sep 2002 18:26:40 -0000 1.98
+++ doc/extend.texi 15 Sep 2002 18:06:25 -0000
@@ -7415,7 +7415,7 @@
and are now removed from g++.
The implicit typename extension has been deprecated and will be removed
-from g++ at some point. In some cases g++ determines that a dependant
+from g++ at some point. In some cases g++ determines that a dependent
type such as @code{TPL<T>::X} is a type without needing a
@code{typename} keyword, contrary to the standard.
Index: doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.182
diff -u -r1.182 invoke.texi
--- doc/invoke.texi 13 Sep 2002 20:35:07 -0000 1.182
+++ doc/invoke.texi 15 Sep 2002 18:06:36 -0000
@@ -5841,7 +5841,7 @@
even if the address is unaligned, and the processor core will rotate the
data as it is being loaded. This option tells the compiler that such
misaligned accesses will cause a MMU trap and that it should instead
-synthesise the access as a series of byte accesses. The compiler can
+synthesize the access as a series of byte accesses. The compiler can
still use word accesses to load half-word data if it knows that the
address is aligned to a word boundary.
@@ -8589,10 +8589,10 @@
on the safe side, this is disabled for the C3x, since the maximum
iteration count on the C3x is @math{2^{23} + 1} (but who iterates loops more than
@math{2^{23}} times on the C3x?). Note that GCC will try to reverse a loop so
-that it can utilise the decrement and branch instruction, but will give
+that it can utilize the decrement and branch instruction, but will give
up if there is more than one memory reference in the loop. Thus a loop
where the loop counter is decremented can generate slightly more
-efficient code, in cases where the RPTB instruction cannot be utilised.
+efficient code, in cases where the RPTB instruction cannot be utilized.
@item -mdp-isr-reload
@itemx -mparanoid
Index: doc/md.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/md.texi,v
retrieving revision 1.49
diff -u -r1.49 md.texi
--- doc/md.texi 30 Aug 2002 19:18:51 -0000 1.49
+++ doc/md.texi 15 Sep 2002 18:06:43 -0000
@@ -3533,7 +3533,7 @@
@cindex looping instruction patterns
@cindex defining looping instruction patterns
-Some machines have special jump instructions that can be utilised to
+Some machines have special jump instructions that can be utilized to
make loops more efficient. A common example is the 68000 @samp{dbra}
instruction which performs a decrement of a register and a branch if the
result was greater than zero. Other machines, in particular digital