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[patch] Fix comment typos.
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sat, 14 Sep 2002 09:39:55 -0400 (EDT)
- Subject: [patch] Fix comment typos.
Hi,
Attached is a patch to fix comment typos. Committed as obvious.
Kazu Hirata
2002-09-14 Kazu Hirata <kazu@cs.umass.edu>
* config/fr30/fr30.h: Fix comment typos.
* config/frv/frv.c: Likewise.
* config/i386/xmmintrin.h: Likewise.
* config/mips/mips.c: Likewise.
* config/sh/sh.c: Likewise.
Index: fr30/fr30.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.h,v
retrieving revision 1.40
diff -u -r1.40 fr30.h
--- fr30/fr30.h 21 Aug 2002 23:24:12 -0000 1.40
+++ fr30/fr30.h 14 Sep 2002 13:32:26 -0000
@@ -992,7 +992,7 @@
* indexed addressing using small signed offsets from the frame pointer
- * register plus register addresing using R13 as the base register.
+ * register plus register addressing using R13 as the base register.
At the moment we only support the first two of these special cases. */
Index: frv/frv.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.c,v
retrieving revision 1.5
diff -u -r1.5 frv.c
--- frv/frv.c 5 Sep 2002 20:58:49 -0000 1.5
+++ frv/frv.c 14 Sep 2002 13:32:34 -0000
@@ -3552,7 +3552,7 @@
{
rtx ret = NULL_RTX;
- /* Don't try to legitimize addreses if we are not optimizing, since the
+ /* Don't try to legitimize addresses if we are not optimizing, since the
address we generate is not a general operand, and will horribly mess
things up when force_reg is called to try and put it in a register because
we aren't optimizing. */
Index: i386/xmmintrin.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/xmmintrin.h,v
retrieving revision 1.5
diff -u -r1.5 xmmintrin.h
--- i386/xmmintrin.h 8 May 2002 23:05:41 -0000 1.5
+++ i386/xmmintrin.h 14 Sep 2002 13:32:35 -0000
@@ -871,7 +871,7 @@
__builtin_ia32_storeups (__P, (__v4sf)__A);
}
-/* Store four SPFP values in reverse order. The addres must be aligned. */
+/* Store four SPFP values in reverse order. The address must be aligned. */
static __inline void
_mm_storer_ps (float *__P, __m128 __A)
{
Index: mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.226
diff -u -r1.226 mips.c
--- mips/mips.c 4 Sep 2002 16:24:22 -0000 1.226
+++ mips/mips.c 14 Sep 2002 13:32:44 -0000
@@ -8092,7 +8092,7 @@
precisely correct.
When not mips16 code nor embedded PIC, if a symbol is in a
- gp addresable section, SYMBOL_REF_FLAG is set prevent gcc from
+ gp addressable section, SYMBOL_REF_FLAG is set prevent gcc from
splitting the reference so that gas can generate a gp relative
reference.
Index: sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.174
diff -u -r1.174 sh.c
--- sh/sh.c 14 Sep 2002 13:12:55 -0000 1.174
+++ sh/sh.c 14 Sep 2002 13:32:51 -0000
@@ -3862,7 +3862,7 @@
split_branches (first);
/* The INSN_REFERENCES_ARE_DELAYED in sh.h is problematic because it
- also has an effect on the register that holds the addres of the sfunc.
+ also has an effect on the register that holds the address of the sfunc.
Insert an extra dummy insn in front of each sfunc that pretends to
use this register. */
if (flag_delayed_branch)