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Re: [patch] new cpu sr71k

So, e-mail from somebody gave me some cause to look further at this

At Fri, 16 Aug 2002 07:37:13 +0000 (UTC), "Eric Christopher" wrote:
> +#define GENERATE_BRANCHLIKELY   (TARGET_BRANCHLIKELY                    \
> +				 && !TARGET_SR71K                       \
> +				 && !TARGET_MIPS16)

I don't understand why that's the right thing.

If SR71K doesn't support branch-likely instructions at all or they are
buggy on that processor, a conditional should be added

If SR71K does have them, but prefers to not use them (regardless of
the "MIPS ISA level" selected, i.e. regardless of ISA_MIPSnn), then
that should be expressed in mips.c ca. line 5211, probably w/ a
reference to a TUNE_* var.

(Users should be able to use -mbranch-likely to override the default,
which this patch does not allow.)

(It occurs to me that I should add TUNE_SB1 into the code in mips.c,
to express a preference regardless of ISA_*.)



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