PowerPC multi-instruction constants

[David Edelsohn <dje at watson dot ibm dot com>]

	This patch consolidates the multi-instruction SImode constant
generation with the DImode constant generation.

David


	* config/rs6000/rs6000.c (rs6000_emit_set_const): Inline
	multi-instruction SImode constant.  Add REG_EQUAL note.
	* config/rs6000/rs6000.md (movsi splitter): Use
	rs6000_emit_set_const. 

Index: rs6000.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.363
diff -c -p -r1.363 rs6000.c
*** rs6000.c	15 Aug 2002 14:51:00 -0000	1.363
--- rs6000.c	19 Aug 2002 16:24:44 -0000
*************** rs6000_emit_set_const (dest, mode, sourc
*** 2368,2402 ****
       enum machine_mode mode;
       int n ATTRIBUTE_UNUSED;
  {
    HOST_WIDE_INT c0, c1;
  
!   if (mode == QImode || mode == HImode || mode == SImode)
      {
        if (dest == NULL)
          dest = gen_reg_rtx (mode);
        emit_insn (gen_rtx_SET (VOIDmode, dest, source));
        return dest;
      }
! 
!   if (GET_CODE (source) == CONST_INT)
      {
!       c0 = INTVAL (source);
!       c1 = -(c0 < 0);
      }
!   else if (GET_CODE (source) == CONST_DOUBLE)
      {
  #if HOST_BITS_PER_WIDE_INT >= 64
!       c0 = CONST_DOUBLE_LOW (source);
!       c1 = -(c0 < 0);
  #else
!       c0 = CONST_DOUBLE_LOW (source);
!       c1 = CONST_DOUBLE_HIGH (source);
  #endif
      }
    else
      abort ();
  
!   return rs6000_emit_set_long_const (dest, c0, c1);
  }
  
  /* Having failed to find a 3 insn sequence in rs6000_emit_set_const,
--- 2368,2426 ----
       enum machine_mode mode;
       int n ATTRIBUTE_UNUSED;
  {
+   rtx result, insn, set;
    HOST_WIDE_INT c0, c1;
  
!   if (mode == QImode || mode == HImode)
      {
        if (dest == NULL)
          dest = gen_reg_rtx (mode);
        emit_insn (gen_rtx_SET (VOIDmode, dest, source));
        return dest;
      }
!   else if (mode == SImode)
      {
!       result = no_new_pseudos ? dest : gen_reg_rtx (SImode);
! 
!       emit_insn (gen_rtx_SET (VOIDmode, result,
! 			      GEN_INT (INTVAL (source)
! 				       & (~ (HOST_WIDE_INT) 0xffff))));
!       emit_insn (gen_rtx_SET (VOIDmode, dest,
! 			      gen_rtx_IOR (SImode, result,
! 					   GEN_INT (INTVAL (source) & 0xffff))));
!       result = dest;
      }
!   else if (mode == DImode)
      {
+       if (GET_CODE (source) == CONST_INT)
+ 	{
+ 	  c0 = INTVAL (source);
+ 	  c1 = -(c0 < 0);
+ 	}
+       else if (GET_CODE (source) == CONST_DOUBLE)
+ 	{
  #if HOST_BITS_PER_WIDE_INT >= 64
! 	  c0 = CONST_DOUBLE_LOW (source);
! 	  c1 = -(c0 < 0);
  #else
! 	  c0 = CONST_DOUBLE_LOW (source);
! 	  c1 = CONST_DOUBLE_HIGH (source);
  #endif
+ 	}
+       else
+ 	abort ();
+ 
+       result = rs6000_emit_set_long_const (dest, c0, c1);
      }
    else
      abort ();
  
!   insn = get_last_insn ();
!   set = single_set (insn);
!   if (! CONSTANT_P (SET_SRC (set)))
!     set_unique_reg_note (insn, REG_EQUAL, source);
! 
!   return result;
  }
  
  /* Having failed to find a 3 insn sequence in rs6000_emit_set_const,
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.203
diff -c -p -r1.203 rs6000.md
*** rs6000.md	9 Aug 2002 17:52:49 -0000	1.203
--- rs6000.md	19 Aug 2002 16:24:44 -0000
***************
*** 8215,8223 ****
  	(ior:SI (match_dup 0)
  		(match_dup 3)))]
    "
! {
!   operands[2] = GEN_INT (INTVAL (operands[1]) & (~ (HOST_WIDE_INT) 0xffff));
!   operands[3] = GEN_INT (INTVAL (operands[1]) & 0xffff);
  }")
  
  (define_insn "*movsi_internal2"
--- 8215,8226 ----
  	(ior:SI (match_dup 0)
  		(match_dup 3)))]
    "
! { rtx tem = rs6000_emit_set_const (operands[0], SImode, operands[1], 2);
! 
!   if (tem == operands[0])
!     DONE;
!   else
!     FAIL;
  }")
  
  (define_insn "*movsi_internal2"