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patch: e500 change spu_const_offset_ok


Indexed addressing is 5-bits, but it's 5-bits worth of double words,
so really it's 8-bits, with the bottom 3 whacked.

[yes, I left 0xff and not 0xf8, because I want to catch any craziness
by gcc possibly not aligning stuff properly... It could happen ;-)]

Committed as obvious.

2002-08-01  Aldy Hernandez  <aldyh@redhat.com>

	* gcc/config/rs6000/rs6000.h (SPU_CONST_OFFSET_OK): Change to
	0xff.


Index: config/rs6000/rs6000.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.216
diff -c -p -r1.216 rs6000.h
*** config/rs6000/rs6000.h	29 Jul 2002 21:19:20 -0000	1.216
--- config/rs6000/rs6000.h	1 Aug 2002 21:06:38 -0000
*************** typedef struct rs6000_args
*** 2029,2036 ****
  
  #define TOC_RELATIVE_EXPR_P(X) (toc_relative_expr_p (X))
  
! /* SPE offset addressing is limited to 5-bits.  */
! #define SPE_CONST_OFFSET_OK(x) (((x) & ~0x1f) == 0)
  
  #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X)				\
    (TARGET_TOC								\
--- 2029,2036 ----
  
  #define TOC_RELATIVE_EXPR_P(X) (toc_relative_expr_p (X))
  
! /* SPE offset addressing is limited to 5-bits worth of double words.  */
! #define SPE_CONST_OFFSET_OK(x) (((x) & ~0xff) == 0)
  
  #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X)				\
    (TARGET_TOC								\


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