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Re: [RFC] PowerPC DFA description
- From: Daniel Egger <degger at fhm dot edu>
- To: David Edelsohn <dje at watson dot ibm dot com>
- Cc: Vladimir Makarov <vmakarov at redhat dot com>, dalej at apple dot com,Daniel Berlin <dan at dberlin dot org>,GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: 30 May 2002 00:40:51 +0200
- Subject: Re: [RFC] PowerPC DFA description
- References: <200205292228.SAA31672@makai.watson.ibm.com>
Am Don, 2002-05-30 um 00.28 schrieb David Edelsohn:
> That is associating instruction types with function units, not
> automata. How many automata per function unit is a different question --
> at least the way Red Hat generated the initial description.
Seems I was mislead by the automaton names. What about renaming the
vec_alu automaton to something like vector and differentiating between
the units like you did with the IU's on 750 vs. 7450? I'm still unsure
about how to model the notion of a subunit though; if we hide all three
subunits on the 7400 in one cpu_unit we'd loose the possibility to
schedule optimally since VALU can execute several instructions in
parallel but just one can be issued per cycle.
I take it that the second argument of define_cpu_unit has to be a
automaton and may not be another unit?
--
Servus,
Daniel