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Re: fr30: Do not split immediate loads unless the destination is a register
Hi Richard,
> On Mon, May 13, 2002 at 11:53:16AM +0100, Nick Clifton wrote:
> > - "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128"
> > + "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128
> > + && GET_CODE (operands[0]) == REG"
> > [(set:SI (match_dup 0) (match_dup 2))
> > (set:SI (match_dup 0) (sign_extend:SI (subreg:QI (match_dup 0) 0)))]
>
> The correct solution is to not blindly add the subreg,
> but rather to use gen_lowpart. I.e.
>
> (define_split
> [(set (match_operand:SI 0 "register_operand" "")
> (match_operand:SI 1 "const_int_operand" ""))]
> "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128"
> [(set:SI (match_dup 0) (match_dup 1))
> (set:SI (match_dup 0) (sign_extend:SI (match_dup 2)))]
> {
> operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff);
> operands[2] = gen_lowpart (QImode, operands[0]);
> })
>
> Note also the use of const_int_operand instead of immediate_operand.
THanks very much for this help. I have checked in the patch below to
follow your directions.
Cheers
Nick
2002-05-29 Nick Clifton <nickc@cambridge.redhat.com>
* config/fr30/fr30.md: Remove previous restriction on splits.
Enforce conformance through gen_lowpart and cont_int_operand.
* config/fr30/fr30.h (BSS_SECTION_ASM_OP): Use ".section .bss"
as the assembler does not support ".bss".
Index: config/fr30/fr30.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.md,v
retrieving revision 1.13
diff -c -3 -p -w -r1.13 fr30.md
*** config/fr30/fr30.md 13 May 2002 10:55:31 -0000 1.13
--- config/fr30/fr30.md 29 May 2002 17:58:18 -0000
***************
*** 286,298 ****
;; and time by loading the positive value and then sign extending it.
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "immediate_operand" ""))]
! "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128
! && GET_CODE (operands[0]) == REG"
! [(set:SI (match_dup 0) (match_dup 2))
! (set:SI (match_dup 0) (sign_extend:SI (subreg:QI (match_dup 0) 0)))]
"{
! operands[2] = GEN_INT (INTVAL (operands[1]) & 0xff);
}"
)
--- 286,298 ----
;; and time by loading the positive value and then sign extending it.
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "const_int_operand" ""))]
! "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128"
! [(set:SI (match_dup 0) (match_dup 1))
! (set:SI (match_dup 0) (sign_extend:SI (match_dup 2)))]
"{
! operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff);
! operands[2] = gen_lowpart (QImode, operands[0]);
}"
)
***************
*** 301,309 ****
;; and space by loading the byte value and shifting it into place.
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "immediate_operand" ""))]
! "(INTVAL (operands[1]) < 0) && ((INTVAL (operands[1]) & 0x00ffffff) == 0)
! && GET_CODE (operands[0]) == REG"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (const_int 24)))
(clobber (reg:CC 16))])]
--- 301,308 ----
;; and space by loading the byte value and shifting it into place.
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "const_int_operand" ""))]
! "(INTVAL (operands[1]) < 0) && ((INTVAL (operands[1]) & 0x00ffffff) == 0)"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (const_int 24)))
(clobber (reg:CC 16))])]
***************
*** 319,328 ****
;; and shifting it into place.
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "immediate_operand" ""))]
"(INTVAL (operands[1]) > 0x00ffffff)
! && ((INTVAL (operands[1]) >> exact_log2 (INTVAL (operands[1]) & (- INTVAL (operands[1])))) < 0x100)
! && GET_CODE (operands[0]) == REG"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (match_dup 3)))
(clobber (reg:CC 16))])]
--- 318,326 ----
;; and shifting it into place.
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (match_operand:SI 1 "const_int_operand" ""))]
"(INTVAL (operands[1]) > 0x00ffffff)
! && ((INTVAL (operands[1]) >> exact_log2 (INTVAL (operands[1]) & (- INTVAL (operands[1])))) < 0x100)"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (match_dup 3)))
(clobber (reg:CC 16))])]
Index: config/fr30/fr30.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.h,v
retrieving revision 1.34
diff -c -3 -p -w -r1.34 fr30.h
*** config/fr30/fr30.h 19 May 2002 05:23:06 -0000 1.34
--- config/fr30/fr30.h 29 May 2002 17:59:39 -0000
*************** do \
*** 1134,1140 ****
uninitialized global data will be output in the data section if
`-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
used. */
! #define BSS_SECTION_ASM_OP "\t.bss"
/*}}}*/
/*{{{ The Overall Framework of an Assembler File. */
--- 1134,1140 ----
uninitialized global data will be output in the data section if
`-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
used. */
! #define BSS_SECTION_ASM_OP "\t.section .bss"
/*}}}*/
/*{{{ The Overall Framework of an Assembler File. */