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[patch] h8300: Clean up bit operations.
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 29 May 2002 10:21:55 -0400 (EDT)
- Subject: [patch] h8300: Clean up bit operations.
Hi,
Attached is a patch to clean up code dealing with bit operations.
Basically, it tries to avoid explicit use of exact_log2.
Tested on h8300 port. Committed.
Kazu Hirata
2002-05-29 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300-protos.h: Remove the prototype for
o_operand.
Add prototypes for single_one_operand and single_zero_operand.
* config/h8300/h8300.c (o_operand): Remove.
(single_one_operand): New.
(single_zero_operand): Likewise.
(print_operand): For 'V' operand, and the operand with 0xff.
For 'V' and 'W' operands, do not and the bit position with 7.
* config/h8300/h8300.md (various anonymous patterns): Replace
use of exact_log2 with single_one_operand/single_zero_operand.
Index: h8300-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300-protos.h,v
retrieving revision 1.27
diff -c -r1.27 h8300-protos.h
*** h8300-protos.h 19 May 2002 05:23:07 -0000 1.27
--- h8300-protos.h 29 May 2002 02:44:50 -0000
***************
*** 48,54 ****
extern int general_operand_src PARAMS ((rtx, enum machine_mode));
extern int general_operand_dst PARAMS ((rtx, enum machine_mode));
! extern int o_operand PARAMS ((rtx, enum machine_mode));
extern int call_insn_operand PARAMS ((rtx, enum machine_mode));
extern int two_insn_adds_subs_operand PARAMS ((rtx, enum machine_mode));
extern int small_call_insn_operand PARAMS ((rtx, enum machine_mode));
--- 48,55 ----
extern int general_operand_src PARAMS ((rtx, enum machine_mode));
extern int general_operand_dst PARAMS ((rtx, enum machine_mode));
! extern int single_one_operand PARAMS ((rtx, enum machine_mode));
! extern int single_zero_operand PARAMS ((rtx, enum machine_mode));
extern int call_insn_operand PARAMS ((rtx, enum machine_mode));
extern int two_insn_adds_subs_operand PARAMS ((rtx, enum machine_mode));
extern int small_call_insn_operand PARAMS ((rtx, enum machine_mode));
Index: h8300.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.c,v
retrieving revision 1.131
diff -c -r1.131 h8300.c
*** h8300.c 19 May 2002 07:55:34 -0000 1.131
--- h8300.c 29 May 2002 02:44:53 -0000
***************
*** 569,583 ****
return general_operand (op, mode);
}
! /* Return true if OP is a const valid for a bit clear instruction. */
int
! o_operand (operand, mode)
rtx operand;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
! return (GET_CODE (operand) == CONST_INT
! && CONST_OK_FOR_O (INTVAL (operand)));
}
/* Return true if OP is a valid call operand. */
--- 569,618 ----
return general_operand (op, mode);
}
! /* Return true if OP is a constant that contains only one 1 in its
! binary representation. */
int
! single_one_operand (operand, mode)
rtx operand;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
! if (GET_CODE (operand) == CONST_INT)
! {
! /* We really need to do this masking because 0x80 in QImode is
! represented as -128 for example. */
! unsigned HOST_WIDE_INT mask =
! ((unsigned HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (mode)) - 1;
! unsigned HOST_WIDE_INT value = INTVAL (operand);
!
! if (exact_log2 (value & mask) >= 0)
! return 1;
! }
!
! return 0;
! }
!
! /* Return true if OP is a constant that contains only one 0 in its
! binary representation. */
!
! int
! single_zero_operand (operand, mode)
! rtx operand;
! enum machine_mode mode ATTRIBUTE_UNUSED;
! {
! if (GET_CODE (operand) == CONST_INT)
! {
! /* We really need to do this masking because 0x80 in QImode is
! represented as -128 for example. */
! unsigned HOST_WIDE_INT mask =
! ((unsigned HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (mode)) - 1;
! unsigned HOST_WIDE_INT value = INTVAL (operand);
!
! if (exact_log2 (~value & mask) >= 0)
! return 1;
! }
!
! return 0;
}
/* Return true if OP is a valid call operand. */
***************
*** 1030,1045 ****
goto def;
break;
case 'V':
! bitint = exact_log2 (INTVAL (x));
if (bitint == -1)
abort ();
! fprintf (file, "#%d", bitint & 7);
break;
case 'W':
bitint = exact_log2 ((~INTVAL (x)) & 0xff);
if (bitint == -1)
abort ();
! fprintf (file, "#%d", bitint & 7);
break;
case 'R':
case 'X':
--- 1065,1080 ----
goto def;
break;
case 'V':
! bitint = exact_log2 (INTVAL (x) & 0xff);
if (bitint == -1)
abort ();
! fprintf (file, "#%d", bitint);
break;
case 'W':
bitint = exact_log2 ((~INTVAL (x)) & 0xff);
if (bitint == -1)
abort ();
! fprintf (file, "#%d", bitint);
break;
case 'R':
case 'X':
Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.85
diff -c -r1.85 h8300.md
*** h8300.md 28 May 2002 12:36:03 -0000 1.85
--- h8300.md 29 May 2002 02:44:55 -0000
***************
*** 1007,1013 ****
[(set (match_operand:QI 0 "bit_operand" "=r,U")
(and:QI (match_operand:QI 1 "bit_operand" "%0,0")
(match_operand:QI 2 "nonmemory_operand" "rn,O")))]
! "register_operand (operands[0], QImode) || o_operand (operands[2], QImode)"
"@
and %X2,%X0
bclr %W2,%R0"
--- 1007,1014 ----
[(set (match_operand:QI 0 "bit_operand" "=r,U")
(and:QI (match_operand:QI 1 "bit_operand" "%0,0")
(match_operand:QI 2 "nonmemory_operand" "rn,O")))]
! "register_operand (operands[0], QImode)
! || single_zero_operand (operands[2], QImode)"
"@
and %X2,%X0
bclr %W2,%R0"
***************
*** 1036,1058 ****
(define_insn "*andorqi3"
[(set (match_operand:QI 0 "register_operand" "=r")
(ior:QI (and:QI (match_operand:QI 2 "register_operand" "r")
! (match_operand:QI 3 "const_int_operand" "n"))
(match_operand:QI 1 "register_operand" "0")))]
! "exact_log2 (INTVAL (operands[3]) & 0xff) != -1"
! "*
! {
! operands[3] = GEN_INT (INTVAL (operands[3]) & 0xff);
! return \"bld\\t%V3,%X2\;bst\\t%V3,%X0\";
! }"
[(set_attr "length" "4")
(set_attr "cc" "clobber")])
(define_insn "*andorhi3"
[(set (match_operand:HI 0 "register_operand" "=r")
(ior:HI (and:HI (match_operand:HI 2 "register_operand" "r")
! (match_operand:HI 3 "const_int_operand" "n"))
(match_operand:HI 1 "register_operand" "0")))]
! "exact_log2 (INTVAL (operands[3]) & 0xffff) != -1"
"*
{
operands[3] = GEN_INT (INTVAL (operands[3]) & 0xffff);
--- 1037,1055 ----
(define_insn "*andorqi3"
[(set (match_operand:QI 0 "register_operand" "=r")
(ior:QI (and:QI (match_operand:QI 2 "register_operand" "r")
! (match_operand:QI 3 "single_one_operand" "n"))
(match_operand:QI 1 "register_operand" "0")))]
! ""
! "bld\\t%V3,%X2\;bst\\t%V3,%X0"
[(set_attr "length" "4")
(set_attr "cc" "clobber")])
(define_insn "*andorhi3"
[(set (match_operand:HI 0 "register_operand" "=r")
(ior:HI (and:HI (match_operand:HI 2 "register_operand" "r")
! (match_operand:HI 3 "single_one_operand" "n"))
(match_operand:HI 1 "register_operand" "0")))]
! ""
"*
{
operands[3] = GEN_INT (INTVAL (operands[3]) & 0xffff);
***************
*** 1082,1102 ****
(ior:QI (match_operand:QI 1 "bit_operand" "%0,0")
(match_operand:QI 2 "nonmemory_operand" "rn,n")))]
"register_operand (operands[0], QImode)
! || (GET_CODE (operands[2]) == CONST_INT
! && exact_log2 (INTVAL (operands[2]) & 0xff) != -1)"
! "*
! {
! switch (which_alternative)
! {
! case 0:
! return \"or\t%X2,%X0\";
! case 1:
! operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff);
! return \"bset\t%V2,%R0\";
! default:
! abort ();
! }
! }"
[(set_attr "length" "2,8")
(set_attr "adjust_length" "no")
(set_attr "cc" "set_znv,none_0hit")])
--- 1079,1088 ----
(ior:QI (match_operand:QI 1 "bit_operand" "%0,0")
(match_operand:QI 2 "nonmemory_operand" "rn,n")))]
"register_operand (operands[0], QImode)
! || single_one_operand (operands[2], QImode)"
! "@
! or\\t%X2,%X0
! bset\\t%V2,%R0"
[(set_attr "length" "2,8")
(set_attr "adjust_length" "no")
(set_attr "cc" "set_znv,none_0hit")])
***************
*** 1135,1155 ****
(xor:QI (match_operand:QI 1 "bit_operand" "%0,0")
(match_operand:QI 2 "nonmemory_operand" "rn,n")))]
"register_operand (operands[0], QImode)
! || (GET_CODE (operands[2]) == CONST_INT
! && exact_log2 (INTVAL (operands[2]) & 0xff) != -1)"
! "*
! {
! switch (which_alternative)
! {
! case 0:
! return \"xor\t%X2,%X0\";
! case 1:
! operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff);
! return \"bnot\t%V2,%R0\";
! default:
! abort ();
! }
! }"
[(set_attr "length" "2,8")
(set_attr "adjust_length" "no")
(set_attr "cc" "set_znv,none_0hit")])
--- 1121,1130 ----
(xor:QI (match_operand:QI 1 "bit_operand" "%0,0")
(match_operand:QI 2 "nonmemory_operand" "rn,n")))]
"register_operand (operands[0], QImode)
! || single_one_operand (operands[2], QImode)"
! "@
! xor\\t%X2,%X0
! bnot\\t%V2,%R0"
[(set_attr "length" "2,8")
(set_attr "adjust_length" "no")
(set_attr "cc" "set_znv,none_0hit")])