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Re: DFA lookahead for Pentium
> On Mon, May 13, 2002 at 01:34:57PM -0600, law@redhat.com wrote:
> > With the DFA lookahead code we can do a little better. Note that the DFA
> > lookahead will always issue the highest priority instruction, but it may
> > issue to a _different unit_ if that allows more instructions to be issued in
> > the same cycle. We'd get the following with the DFA lookahead:
> >
> > Cycle 1: I2 to unit U, I1 to unit V
> > Cycle 2: I3 to unit U, I4 to unit V
>
> Which is not how the Pentium will actually issue the instructions.
> It will strictly issue PUV to U if U is free.
The machine description use absence_set/presence_set VLIW bits to require
instructions to be swapped.
Only where we lose the track and I am aware of is the fact that pentium
starts to decode instruction even when memory dependencies are not resolves
and stalls it in the pipe, instead of waiting until it is ready.
This makes us to run out of sync, however I don't know how to model it properly.
Honza
>
> If we want this modeled properly, we need to get the instructions
> interchanged.
>
>
> r~