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fix use of sp as a reload register for the Xtensa port



This patch fixes a 3.1 regression for the Xtensa port where reload was
using the stack pointer as a reload register, resulting in an invalid
instruction.  Tested on xtensa-elf.  Patch applied on 3.1 branch and
top-of-trunk.

2002-03-22  Bob Wilson  <bob.wilson@acm.org>

	* config/xtensa/xtensa-protos.h (non_acc_reg_operand): Remove.
	(xtensa_valid_move, xtensa_preferred_reload_class): Define.
	* config/xtensa/xtensa.c (non_acc_reg_operand): Remove.
	(xtensa_valid_move, xtensa_preferred_reload_class): Define to
	prevent use of sp as a reload register.
	(xtensa_emit_move_sequence): Use xtensa_valid_move instead of
	non_acc_reg_operand.
	* config/xtensa/xtensa.h (PREDICATE_CODES): Remove non_acc_reg_operand.
	(PREFERRED_RELOAD_CLASS): Move code to xtensa_preferred_reload_class.
	* config/xtensa/xtensa.md (movsi_internal, movhi_internal,
	movqi_internal): Use xtensa_valid_move instead of non_acc_reg_operand.

cvs server: Diffing .
Index: xtensa-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa-protos.h,v
retrieving revision 1.1
diff -c -3 -r1.1 xtensa-protos.h
*** xtensa-protos.h	2002/01/23 21:03:50	1.1
--- xtensa-protos.h	2002/03/22 22:33:16
***************
*** 43,49 ****
  extern int arith_operand PARAMS ((rtx, enum machine_mode));
  extern int nonimmed_operand PARAMS ((rtx, enum machine_mode));
  extern int mem_operand PARAMS ((rtx, enum machine_mode));
! extern int non_acc_reg_operand PARAMS ((rtx, enum machine_mode));
  extern int mask_operand PARAMS ((rtx, enum machine_mode));
  extern int extui_fldsz_operand PARAMS ((rtx, enum machine_mode));
  extern int sext_operand PARAMS ((rtx, enum machine_mode));
--- 43,49 ----
  extern int arith_operand PARAMS ((rtx, enum machine_mode));
  extern int nonimmed_operand PARAMS ((rtx, enum machine_mode));
  extern int mem_operand PARAMS ((rtx, enum machine_mode));
! extern int xtensa_valid_move PARAMS ((enum machine_mode, rtx *operands));
  extern int mask_operand PARAMS ((rtx, enum machine_mode));
  extern int extui_fldsz_operand PARAMS ((rtx, enum machine_mode));
  extern int sext_operand PARAMS ((rtx, enum machine_mode));
***************
*** 87,92 ****
--- 87,94 ----
    PARAMS ((FILE *, rtx, enum machine_mode, int labelno));
  extern void xtensa_reorg PARAMS ((rtx));
  extern rtx xtensa_builtin_saveregs PARAMS ((void));
+ extern enum reg_class xtensa_preferred_reload_class
+   PARAMS ((rtx, enum reg_class));
  extern enum reg_class xtensa_secondary_reload_class
    PARAMS ((enum reg_class, enum machine_mode, rtx, int));
  extern int a7_overlap_mentioned_p PARAMS ((rtx x));
Index: xtensa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.c,v
retrieving revision 1.1.12.1
diff -c -3 -r1.1.12.1 xtensa.c
*** xtensa.c	2002/03/12 23:34:58	1.1.12.1
--- xtensa.c	2002/03/22 22:33:16
***************
*** 440,451 ****
  
  
  int
! non_acc_reg_operand (op, mode)
!      rtx op;
       enum machine_mode mode;
  {
!   if (register_operand (op, mode))
!     return !ACC_REG_P (xt_true_regnum (op));
    return FALSE;
  }
  
--- 440,471 ----
  
  
  int
! xtensa_valid_move (mode, operands)
       enum machine_mode mode;
+      rtx *operands;
  {
!   /* Either the destination or source must be a register, and the
!      MAC16 accumulator doesn't count.  */
! 
!   if (register_operand (operands[0], mode))
!     {
!       int dst_regnum = xt_true_regnum (operands[0]);
! 
!       /* The stack pointer can only be assigned with a MOVSP opcode. */
!       if (dst_regnum == STACK_POINTER_REGNUM)
! 	return (mode == SImode
! 		&& register_operand (operands[1], mode)
! 		&& !ACC_REG_P (xt_true_regnum (operands[1])));
! 
!       if (!ACC_REG_P (dst_regnum))
! 	return true;
!     }
!   else if (register_operand (operands[1], mode))
!     {
!       int src_regnum = xt_true_regnum (operands[1]);
!       if (!ACC_REG_P (src_regnum))
! 	return true;
!     }
    return FALSE;
  }
  
***************
*** 1239,1246 ****
  
    if (!(reload_in_progress | reload_completed))
      {
!       if (!non_acc_reg_operand (operands[0], mode)
! 	  && !non_acc_reg_operand (operands[1], mode))
  	operands[1] = force_reg (mode, operands[1]);
  
        /* Check if this move is copying an incoming argument in a7.  If
--- 1259,1265 ----
  
    if (!(reload_in_progress | reload_completed))
      {
!       if (!xtensa_valid_move (mode, operands))
  	operands[1] = force_reg (mode, operands[1]);
  
        /* Check if this move is copying an incoming argument in a7.  If
***************
*** 2535,2540 ****
--- 2554,2575 ----
    addr = expand_expr (addr_tree, NULL_RTX, Pmode, EXPAND_NORMAL);
    addr = copy_to_reg (addr);
    return addr;
+ }
+ 
+ 
+ enum reg_class
+ xtensa_preferred_reload_class (x, class)
+      rtx x;
+      enum reg_class class;
+ {
+   if (CONSTANT_P (x) && GET_CODE (x) == CONST_DOUBLE)
+     return NO_REGS;
+ 
+   /* Don't use sp for reloads! */
+   if (class == AR_REGS)
+     return GR_REGS;
+ 
+   return class;
  }
  
  
Index: xtensa.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.h,v
retrieving revision 1.1.12.3
diff -c -3 -r1.1.12.3 xtensa.h
*** xtensa.h	2002/03/20 22:38:39	1.1.12.3
--- xtensa.h	2002/03/22 22:33:17
***************
*** 719,730 ****
     : ((CODE) == 'U') ? !constantpool_mem_p (OP)				\
     : FALSE)
  
- /* Given an rtx X being reloaded into a reg required to be
-    in class CLASS, return the class of reg to actually use.  */
  #define PREFERRED_RELOAD_CLASS(X, CLASS)				\
!   (CONSTANT_P (X)							\
!    ? (GET_CODE (X) == CONST_DOUBLE) ? NO_REGS : (CLASS)			\
!    : (CLASS))
  
  #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS)				\
    (CLASS)
--- 719,726 ----
     : ((CODE) == 'U') ? !constantpool_mem_p (OP)				\
     : FALSE)
  
  #define PREFERRED_RELOAD_CLASS(X, CLASS)				\
!   xtensa_preferred_reload_class (X, CLASS)
  
  #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS)				\
    (CLASS)
***************
*** 1522,1528 ****
    {"add_operand",		{ REG, CONST_INT, SUBREG }},		\
    {"arith_operand",		{ REG, CONST_INT, SUBREG }},		\
    {"nonimmed_operand",		{ REG, SUBREG, MEM }},			\
-   {"non_acc_reg_operand",	{ REG, SUBREG }},			\
    {"mem_operand",		{ MEM }},				\
    {"mask_operand",		{ REG, CONST_INT, SUBREG }},		\
    {"extui_fldsz_operand",	{ CONST_INT }},				\
--- 1518,1523 ----
Index: xtensa.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.md,v
retrieving revision 1.1.12.1
diff -c -3 -r1.1.12.1 xtensa.md
*** xtensa.md	2002/03/19 20:13:22	1.1.12.1
--- xtensa.md	2002/03/22 22:33:17
***************
*** 1009,1016 ****
  (define_insn "movsi_internal"
    [(set (match_operand:SI 0 "nonimmed_operand" "=D,D,D,D,R,R,a,q,a,a,a,U,*a,*A")
  	(match_operand:SI 1 "move_operand" "M,D,d,R,D,d,r,r,I,T,U,r,*A,*r"))]
!   "non_acc_reg_operand (operands[0], SImode)
!    || non_acc_reg_operand (operands[1], SImode)"
    "@
     movi.n\\t%0, %x1
     mov.n\\t%0, %1
--- 1009,1015 ----
  (define_insn "movsi_internal"
    [(set (match_operand:SI 0 "nonimmed_operand" "=D,D,D,D,R,R,a,q,a,a,a,U,*a,*A")
  	(match_operand:SI 1 "move_operand" "M,D,d,R,D,d,r,r,I,T,U,r,*A,*r"))]
!   "xtensa_valid_move (SImode, operands)"
    "@
     movi.n\\t%0, %x1
     mov.n\\t%0, %1
***************
*** 1045,1052 ****
  (define_insn "movhi_internal"
    [(set (match_operand:HI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
  	(match_operand:HI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
!   "non_acc_reg_operand (operands[0], HImode)
!    || non_acc_reg_operand (operands[1], HImode)"
    "@
     movi.n\\t%0, %x1
     mov.n\\t%0, %1
--- 1044,1050 ----
  (define_insn "movhi_internal"
    [(set (match_operand:HI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
  	(match_operand:HI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
!   "xtensa_valid_move (HImode, operands)"
    "@
     movi.n\\t%0, %x1
     mov.n\\t%0, %1
***************
*** 1075,1082 ****
  (define_insn "movqi_internal"
    [(set (match_operand:QI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
  	(match_operand:QI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
!   "non_acc_reg_operand (operands[0], QImode)
!    || non_acc_reg_operand (operands[1], QImode)"
    "@
     movi.n\\t%0, %x1
     mov.n\\t%0, %1
--- 1073,1079 ----
  (define_insn "movqi_internal"
    [(set (match_operand:QI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
  	(match_operand:QI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
!   "xtensa_valid_move (QImode, operands)"
    "@
     movi.n\\t%0, %x1
     mov.n\\t%0, %1

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