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Re: [again] switch() statements on ARM/Thumb


> +(define_insn "*thumb_subsi3imm_insn"
> +  [(set (match_operand:SI           0 "register_operand" "=l,l")
> +	(minus:SI (match_operand:SI 1 "register_operand" "l,0")
> +		  (match_operand:SI 2 "const_int_operand" "L,I")))]
> +  "TARGET_THUMB && ((unsigned int)INTVAL(operands[2]) < 256)"
> +  "@
> +  sub\\t%0, %1, %2
> +  sub\\t%0, %2"
> +  [(set_attr "length" "2")]
> +)
> +

This should be merged with the existing thumb_subsi3_insn pattern.


> +; this works only if the label_ref is close enough (10 bit word aligned)
> +; but it should only be called from thumbpic_casesi anyway.
> +(define_insn "*thumb_adr"
> +  [(set (match_operand:SI 0 "s_register_operand" "=l")
> +        (label_ref (match_operand 1 "" "")))]
> +  "TARGET_THUMB"
> +  "adr\\t%0, %a1"
> +  [(set_attr "length" "2")]
> +)
> +

I'm very nervous about this.  In particular the assertion that this will 
only be generated by thumbpic_casesi and so will always be in range.  
Experience has shown that combine and CSE are very good at making use of 
such patterns in ways that are unexpected and that then lead to compiler 
aborts or invalid assembly code.  I can't prove that it won't work, but 
have you run the entire testsuite (in thumb mode, of course) and shown 
that this doesn't cause regressions?

R.


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