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[patch] Fix comment formatting.


Hi,

Attached is a patch to fix comment formatting.  Committed as obvious.

Kazu Hirata

2001-12-29  Kazu Hirata  <kazu@hxi.com>

	* config/rs6000/darwin-tramp.asm: Fix comment formatting.
	* config/rs6000/freebsd.h: Likewise.
	* config/rs6000/rs6000.c: Likewise.
	* config/sh/sh.c: Likewise.
	* config/sh/sh.h: Likewise.

Index: rs6000/darwin-tramp.asm
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/darwin-tramp.asm,v
retrieving revision 1.1
diff -u -r1.1 darwin-tramp.asm
--- darwin-tramp.asm	2001/12/07 17:35:03	1.1
+++ darwin-tramp.asm	2001/12/29 09:02:40
@@ -33,7 +33,7 @@
  *  executable file might be covered by the GNU General Public License.
  */ 
 
-/* Set up trampolines. */
+/* Set up trampolines.  */
 
 .text
 	.align	2
Index: rs6000/freebsd.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/freebsd.h,v
retrieving revision 1.1
diff -u -r1.1 freebsd.h
--- freebsd.h	2001/11/20 19:43:27	1.1
+++ freebsd.h	2001/12/29 09:02:40
@@ -18,7 +18,7 @@
 along with GNU CC; see the file COPYING.  If not, write to
 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
 
-/* Override the defaults, which exist to force the proper definition. */
+/* Override the defaults, which exist to force the proper definition.  */
 
 #undef	CPP_OS_DEFAULT_SPEC
 #define CPP_OS_DEFAULT_SPEC "%(cpp_os_freebsd)"
Index: rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.269
diff -u -r1.269 rs6000.c
--- rs6000.c	2001/12/23 06:58:48	1.269
+++ rs6000.c	2001/12/29 09:02:44
@@ -722,7 +722,7 @@
 }
 
 /* Return 1 if OP is a signed 8-bit constant.  Int multiplication
-   by such constants completes more quickly. */
+   by such constants completes more quickly.  */
 
 int
 s8bit_cint_operand (op, mode)
@@ -1813,7 +1813,7 @@
       && GET_CODE (XEXP (XEXP (XEXP (x, 1), 0), 1)) == SYMBOL_REF)
     {
       /* Result of previous invocation of this function on Darwin
-	 floating point constant. */
+	 floating point constant.  */
       push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
 		BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
 		opnum, (enum reload_type)type);
@@ -3982,7 +3982,7 @@
   def_builtin (MASK_ALTIVEC, "__builtin_altivec_ld_internal_16qi", v16qi_ftype_pchar, ALTIVEC_BUILTIN_LD_INTERNAL_16qi);
   def_builtin (MASK_ALTIVEC, "__builtin_altivec_st_internal_16qi", void_ftype_pchar_v16qi, ALTIVEC_BUILTIN_ST_INTERNAL_16qi);
 
-  /* Add the simple ternary operators. */
+  /* Add the simple ternary operators.  */
   d = (struct builtin_description *) bdesc_3arg;
   for (i = 0; i < sizeof (bdesc_3arg) / sizeof *d; i++, d++)
     {
@@ -4280,7 +4280,7 @@
     return 1;
 
   /* store_one_arg depends on expand_block_move to handle at least the size of
-     reg_parm_stack_space. */	
+     reg_parm_stack_space.  */	
   if (bytes > (TARGET_POWERPC64 ? 64 : 32))
     return 0;
 
Index: sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.129
diff -u -r1.129 sh.c
--- sh.c	2001/12/23 16:07:16	1.129
+++ sh.c	2001/12/29 09:02:45
@@ -80,7 +80,7 @@
    sh_expand_prologue.  */
 int current_function_anonymous_args;
 
-/* Global variables for machine-dependent things. */
+/* Global variables for machine-dependent things.  */
 
 /* Which cpu are we scheduling for.  */
 enum processor_type sh_cpu;
@@ -1455,7 +1455,7 @@
 	      continue;
 	    }
 	  /* ??? Could try to put zero extend into initial right shift,
-	     or even shift a bit left before the right shift. */
+	     or even shift a bit left before the right shift.  */
 	  /* Determine value of first part of left shift, to get to the
 	     zero extend cut-off point.  */
 	  first = width - exact_log2 (lsb2) + right;
@@ -3236,7 +3236,7 @@
 		 entirely reliable around libcalls;
 		 newlib/libm/math/e_pow.c is a test case.  Sometimes
 		 an insn will appear in LOG_LINKS even though it is
-		 not the most recent insn which sets the register. */
+		 not the most recent insn which sets the register.  */
 
 	      if (foundinsn
 		  && (scanset
@@ -3846,7 +3846,7 @@
 	emit_insn (gen_addsi3 (reg, reg, GEN_INT (size)));
       /* Try to do it with two partial adjustments; however, we must make
 	 sure that the stack is properly aligned at all times, in case
-	 an interrupt occurs between the two partial adjustments. */
+	 an interrupt occurs between the two partial adjustments.  */
       else if (CONST_OK_FOR_I (size / 2 & -4)
 	       && CONST_OK_FOR_I (size - (size / 2 & -4)))
 	{
@@ -4082,7 +4082,7 @@
   extra_push = 0;
 
   /* This is set by SETUP_VARARGS to indicate that this is a varargs
-     routine.  Clear it here so that the next function isn't affected. */
+     routine.  Clear it here so that the next function isn't affected.  */
   if (current_function_anonymous_args)
     {
       current_function_anonymous_args = 0;
@@ -4268,7 +4268,7 @@
   int bufsize, regno;
   HOST_WIDE_INT alias_set;
 
-  /* Allocate block of memory for the regs. */
+  /* Allocate block of memory for the regs.  */
   /* ??? If n_intregs + n_floatregs == 0, should we allocate at least 1 byte?
      Or can assign_stack_local accept a 0 SIZE argument?  */
   bufsize = (n_intregs * UNITS_PER_WORD) + (n_floatregs * UNITS_PER_WORD);
@@ -5509,7 +5509,7 @@
 }
 
 /* Convert a non-PIC address in `orig' to a PIC address using @GOT or
-   @GOTOFF in `reg'. */
+   @GOTOFF in `reg'.  */
 rtx
 legitimize_pic_address (orig, mode, reg)
      rtx orig;
Index: sh/sh.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.h,v
retrieving revision 1.124
diff -u -r1.124 sh.h
--- sh.h	2001/12/23 16:07:16	1.124
+++ sh.h	2001/12/29 09:02:45
@@ -164,10 +164,10 @@
 /* Nonzero if we should generate code using type 3E insns.  */
 #define TARGET_SH3E (target_flags & SH3E_BIT)
 
-/* Nonzero if the cache line size is 32. */
+/* Nonzero if the cache line size is 32.  */
 #define TARGET_CACHE32 (target_flags & HARD_SH4_BIT)
 
-/* Nonzero if we schedule for a superscalar implementation. */
+/* Nonzero if we schedule for a superscalar implementation.  */
 #define TARGET_SUPERSCALAR (target_flags & HARD_SH4_BIT)
 
 /* Nonzero if the target has separate instruction and data caches.  */
@@ -430,7 +430,7 @@
    && GET_CODE (PREV_INSN (A_LABEL)) == INSN				\
    && GET_CODE (PATTERN (PREV_INSN (A_LABEL))) == UNSPEC_VOLATILE	\
    && XINT (PATTERN (PREV_INSN (A_LABEL)), 1) == UNSPECV_ALIGN)		\
-   /* explicit alignment insn in constant tables. */			\
+   /* explicit alignment insn in constant tables.  */			\
   ? INTVAL (XVECEXP (PATTERN (PREV_INSN (A_LABEL)), 0, 0))		\
   : 0)
 
@@ -998,7 +998,7 @@
   ((TYPE) != 0						\
    && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST	\
        || TREE_ADDRESSABLE (TYPE)))
-/* Some subroutine macros specific to this machine. */
+/* Some subroutine macros specific to this machine.  */
 
 #define BASE_RETURN_VALUE_REG(MODE) \
   ((TARGET_SH3E && ((MODE) == SFmode))			\
@@ -1046,7 +1046,7 @@
 #define LIBCALL_VALUE(MODE) \
   gen_rtx_REG ((MODE), BASE_RETURN_VALUE_REG (MODE));
 
-/* 1 if N is a possible register number for a function value. */
+/* 1 if N is a possible register number for a function value.  */
 #define FUNCTION_VALUE_REGNO_P(REGNO) \
   ((REGNO) == FIRST_RET_REG || (TARGET_SH3E && (REGNO) == FIRST_FP_RET_REG))
 
@@ -1134,7 +1134,7 @@
 	  : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))))
 
 /* Return boolean indicating arg of mode MODE will be passed in a reg.
-   This macro is only used in this file. */
+   This macro is only used in this file.  */
 
 #define PASS_IN_REG_P(CUM, MODE, TYPE) \
   (((TYPE) == 0 \
@@ -1642,7 +1642,7 @@
 /* Define as C expression which evaluates to nonzero if the tablejump
    instruction expects the table to contain offsets from the address of the
    table.
-   Do not define this if the table should contain absolute addresses. */
+   Do not define this if the table should contain absolute addresses.  */
 #define CASE_VECTOR_PC_RELATIVE 1
 
 /* Specify the tree operation to be used to convert reals to integers.  */
@@ -1916,7 +1916,7 @@
    specified as the number of bits.
 
    Try to use function `asm_output_aligned_bss' defined in file
-   `varasm.c' when defining this macro. */
+   `varasm.c' when defining this macro.  */
 #ifndef ASM_OUTPUT_ALIGNED_BSS
 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
@@ -2021,11 +2021,11 @@
    assemble_name ((STREAM), (NAME)),		\
    fputc ('\n', (STREAM)))
 
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols.  */
 
 #define USER_LABEL_PREFIX "_"
 
-/* The prefix to add to an internally generated label. */
+/* The prefix to add to an internally generated label.  */
 
 #define LOCAL_LABEL_PREFIX ""
 


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