This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[patch] h8300.md: Remove incorrect patterns


Hi,

Attached is a patch to remove two incorrect patterns from h8300.md.

I haven't been able to trigger these patterns.  However, these, if
triggered, would generate wrong code.  They are inconsistent with the
insn output function, output_simode_bld, which generates a bit store
to bit 0 of the destination register.  The RTX in these patterns do
not involve lshiftrt or zero_extract.

Tested and comitted.

Kazu Hirata

2001-12-27  Kazu Hirata  <kazu@hxi.com>

	* config/h8300/h8300.md (two anonymous patterns): Remove.

Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.46
diff -c -r1.46 h8300.md
*** h8300.md	2001/12/15 18:26:26	1.46
--- h8300.md	2001/12/27 16:06:17
***************
*** 2104,2127 ****
  ;;
  ;; Inverted loads with a 32bit destination.
  ;;
! ;; Yes, all seven cases are needed.
  ;;
  (define_insn ""
    [(set (match_operand:SI 0 "register_operand" "=&r")
  	(and:SI (not:SI
- 		  (zero_extend:SI (match_operand:HI 1 "register_operand" "r")))
- 		(match_operand:SI 2 "p_operand" "P")))]
-   ""
-   "* return output_simode_bld (1, 1, operands);"
-   [(set_attr "cc" "clobber")
-    (set (attr "length")
- 	(if_then_else (eq (symbol_ref "TARGET_H8300H || TARGET_H8300S")
- 			  (const_int 0))
- 		      (const_int 10)
- 		      (const_int 8)))])
- (define_insn ""
-   [(set (match_operand:SI 0 "register_operand" "=&r")
- 	(and:SI (not:SI
  		  (zero_extend:SI
  		    (lshiftrt:HI (match_operand:HI 1 "bit_operand" "Ur")
  				 (match_operand:HI 2 "const_int_operand" "n"))))
--- 2104,2114 ----
  ;;
  ;; Inverted loads with a 32bit destination.
  ;;
! ;; Yes, all five cases are needed.
  ;;
  (define_insn ""
    [(set (match_operand:SI 0 "register_operand" "=&r")
  	(and:SI (not:SI
  		  (zero_extend:SI
  		    (lshiftrt:HI (match_operand:HI 1 "bit_operand" "Ur")
  				 (match_operand:HI 2 "const_int_operand" "n"))))
***************
*** 2135,2153 ****
  		      (const_int 10)
  		      (const_int 8)))])
  
- (define_insn ""
-   [(set (match_operand:SI 0 "register_operand" "=&r")
- 	(and:SI (not:SI
- 		  (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))
- 		(match_operand:SI 2 "p_operand" "P")))]
-   ""
-   "* return output_simode_bld (1, 1, operands);"
-   [(set_attr "cc" "clobber")
-    (set (attr "length")
- 	(if_then_else (eq (symbol_ref "TARGET_H8300H || TARGET_H8300S")
- 			  (const_int 0))
- 		      (const_int 10)
- 		      (const_int 8)))])
  (define_insn ""
    [(set (match_operand:SI 0 "register_operand" "=&r")
  	(and:SI (not:SI
--- 2122,2127 ----


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]