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Vector subregs


The main question in my last post got somewhat lost in the legalities,
so here is a patch to do what I think should happen.  Subreg's of vectors
don't have a register implementation on any hardware AFAIK, so there is
no reason to support them.


2001-12-14  Dale Johannesen  <dalej@apple.com>

         * function.c:  Prevent subregs of vectors from being generated.

Index: function.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/function.c,v
retrieving revision 1.330
diff -u -d -b -w -c -3 -p -r1.330 function.c
cvs server: conflicting specifications of output style
*** function.c  2001/12/04 09:29:52     1.330
--- function.c  2001/12/14 18:39:57
*************** purge_addressof_1 (loc, insn, force, sto
*** 3088,3093 ****
--- 3088,3095 ----
           /* Don't even consider working with paradoxical subregs,
              or the moral equivalent seen here.  */
           if (size_x <= size_sub
+             && GET_MODE_CLASS (GET_MODE (sub)) != MODE_VECTOR_INT
+             && GET_MODE_CLASS (GET_MODE (sub)) != MODE_VECTOR_FLOAT
               && int_mode_for_mode (GET_MODE (sub)) != BLKmode)
             {
               /* Do a bitfield insertion to mirror what would happen


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