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Re: SPARC: convert text peepholes to RTL peepholes
- From: Richard Henderson <rth at redhat dot com>
- To: Dan Nicolaescu <dann at godzilla dot ICS dot UCI dot EDU>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Tue, 11 Dec 2001 18:18:01 -0800
- Subject: Re: SPARC: convert text peepholes to RTL peepholes
- References: <200109161311.aa08702@gremlin-relay.ics.uci.edu>
On Sun, Sep 16, 2001 at 01:11:04PM -0700, Dan Nicolaescu wrote:
> - || (TARGET_ARCH64
> + || (TARGET_V9
> && (operands[1] == const0_rtx)))
> goto movdi_is_ok;
This one's ok,
> - else if (TARGET_ARCH64
> + else if (TARGET_V9
> && CONSTANT_P (operands[1])
> && GET_CODE (operands[1]) != HIGH
> && GET_CODE (operands[1]) != LO_SUM)
This one isn't.
> + (define_insn "movdi_zero"
> + [(set (match_operand:DI 0 "memory_operand" "")
> + (const_int 0))]
> + "TARGET_V9"
> + "stx\\t%%g0, %0"
> + [(set_attr "type" "store")])
Should be merged with movdi_insn_sp32 into a new pattern,
movdi_insn_sp32v9. There should also be a TARGET_V8PLUS
variant; I'm sort of confused that there isn't.
> + (define_insn "cmp_cc_set"
> + [(set (match_operand:SI 0 "register_operand" "=r")
> + (match_operand:SI 1 "register_operand" "r"))
> + (set (reg:CC 100)
> + (compare:CC (match_operand:SI 2 "register_operand" "r")
> + (const_int 0)))]
> + "(rtx_equal_p (operands[2], operands[0])
> + || rtx_equal_p (operands[2], operands[1]))
> + && ! SPARC_FP_REG_P (REGNO (operands[0]))
> + && ! SPARC_FP_REG_P (REGNO (operands[1]))"
If the pattern name isn't used (ie. gen_cmp_cc_set), then it
should begin with a *.
SPARC_FP_REG_P is handled by the "r" constraint on an insn.
Operand 2 should be (match_dup 1).
> + (define_insn "cmp_ccx_set64"
Likewise.
Looks ok otherwise.
r~