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Re: recognize x86 CPU variants take II
- From: Janis Johnson <janis187 at us dot ibm dot com>
- To: Jan Hubicka <jh at suse dot cz>
- Cc: gcc-patches at gcc dot gnu dot org, rth at cygnus dot com, patches at x86-64 dot org
- Date: Tue, 11 Dec 2001 13:49:45 -0800
- Subject: Re: recognize x86 CPU variants take II
- References: <20011211124354.A29171@atrey.karlin.mff.cuni.cz>
On Tue, Dec 11, 2001 at 12:43:54PM +0100, Jan Hubicka wrote:
> Tue Dec 11 11:23:36 CET 2001 Jan Hubicka <firstname.lastname@example.org>
> * i386.c (override_options): Recognize various CPU variants and set
> SSE/MMX/3dNOW flags accordingly.
> * i386.h (MASK_NOMMX, MASK_NOSSE, MASK_NOSSE2, MASK_NO3DNOW,
> MASK_NO3DNOW_A): New.
> (MASK_*): Renumber.
> (TARGET_FLAGS): Use new masks.
> (CPP_CPU_SPECS): Recognize new CPU variants.
> * invoke.texi (-mcpu): Update documentation.
This change could use some tests so we'll know when it breaks and to
ensure that you get what you expect to begin with.
See http://gcc.gnu.org/ml/gcc-patches/2001-11/msg02128.html for an
example of what I plan for testing prefetch support for x86 targets;
similar tests could check that the expected type of fp instructions
are being used, or that instructions from extension sets are only used
for the appropriate sets of options.