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Re: recognize x86 CPU variants and default SSE/MMX/3dNOW support

From: Richard Henderson <rth at redhat dot com>
To: Jan Hubicka <jh at suse dot cz>
Cc: gcc-patches at gcc dot gnu dot org, patches at x86-64 dot org
Date: Tue, 11 Dec 2001 09:46:12 -0800
Subject: Re: recognize x86 CPU variants and default SSE/MMX/3dNOW support
References: <20011211113025.E14550@atrey.karlin.mff.cuni.cz> <20011211091958.A24375@redhat.com> <20011211182654.A8540@atrey.karlin.mff.cuni.cz>

On Tue, Dec 11, 2001 at 06:26:54PM +0100, Jan Hubicka wrote:
> What is wrong with defaulting to SSE math on these CPUs?

Take up this discussion with Uli.

> I can prepare the patch today or tomorrow. The obstacke is that we do use
> constraint letter for SSE that disappears if SSE is not present, so for SSE
> match we will need to invent yet another letter.

Err.. why?


r~

Follow-Ups:
- Re: recognize x86 CPU variants and default SSE/MMX/3dNOW support
  - From: Jan Hubicka

References:
- recognize x86 CPU variants and default SSE/MMX/3dNOW support
  - From: Jan Hubicka
- Re: recognize x86 CPU variants and default SSE/MMX/3dNOW support
  - From: Richard Henderson
- Re: recognize x86 CPU variants and default SSE/MMX/3dNOW support
  - From: Jan Hubicka

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