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Re: recognize x86 CPU variants take II


Jan,

Jan Hubicka wrote:
> 
> Hi,
> thanks to all for numberous feedback.  This patch removes the 'l' in word mobille,
> and removes 3dNOW support from K6, as K6-2 is the first one.
> I am still not sure whether Athlon-xp do have SSE or not.
> 
[snip]

> ! #define MASK_MMX              0x00004000      /* Support MMX regs/builtins */
> ! #define MASK_NOMMX            0x00008000      /* Support MMX regs/builtins */
						     ^wrong comment

> ! #define MASK_SSE              0x00010000      /* Support SSE regs/builtins */
> ! #define MASK_NOSSE            0x00020000      /* Support SSE regs/builtins */
						     ^ wrong comment

> ! #define MASK_SSE2             0x00040000      /* Support SSE2 regs/builtins */
> ! #define MASK_NOSSE2           0x00080000      /* Support SSE2 regs/builtins */
						     ^ wrong comment

>   #define MASK_3DNOW            0x00100000      /* Support 3Dnow builtins */
> ! #define MASK_NO3DNOW          0x00200000      /* Support 3Dnow builtins */
						     ^ wrong comment

> ! #define MASK_3DNOW_A          0x00400000      /* Support Athlon 3Dnow builtins */
> ! #define MASK_NO3DNOW_A                0x00800000      /* Support Athlon 3Dnow builtins */
							     ^ wrong comment

> ! #define MASK_128BIT_LONG_DOUBLE 0x01000000    /* long double size is 128bit */


Graham


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