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Re: patch: rs6000 specific
- From: Geoff Keating <geoffk at geoffk dot org>
- To: Dale Johannesen <dalej at apple dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: 04 Dec 2001 15:22:24 -0800
- Subject: Re: patch: rs6000 specific
- References: <F2EF357C-E8EA-11D5-8923-003065C86F94@apple.com>
- Reply-to: Geoff Keating <geoffk at redhat dot com>
Dale Johannesen <dalej@apple.com> writes:
> This adds some additional patterns for multiply-add instructions.
> Bootstrapped and tested on Darwin. (The !POWERPC variants are
> included, analogous to what was already there, but I was unable
> to test them.)
I think that some of these are cases that should never occur.
Perhaps the generic code is not canonifing them properly?
It might be that some of these are not strictly IEEE compliant, in
which case the generic code should still fold them... but only when
-ffast-math is specified.
>
> 2001-12-04 Dale Johannesen <dalej@apple.com>
>
> * config/rs6000/rs6000.md: add more multiply-add patterns
>
>
> Index: rs6000.md
> ===================================================================
> RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
> retrieving revision 1.141
> diff -u -d -b -w -c -3 -p -r1.141 rs6000.md
> *** rs6000.md 2001/12/01 01:59:00 1.141
> --- rs6000.md 2001/12/04 18:31:09
> ***************
> *** 4818,4823 ****
> --- 4837,4843 ----
> "{fd|fdiv} %0,%1,%2"
> [(set_attr "type" "ddiv")])
>
> + ;; fmadd: D = (A * B) + C
> (define_insn ""
> [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
> ***************
> *** 4836,4841 ****
> --- 4856,4862 ----
> "{fma|fmadd} %0,%1,%2,%3"
> [(set_attr "type" "dmul")])
>
> + ;; fmsub 1: D = (A * B) - C
> (define_insn ""
> [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> (minus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
> ***************
> *** 4854,4859 ****
> --- 4875,4942 ----
> "{fms|fmsub} %0,%1,%2,%3"
> [(set_attr "type" "dmul")])
>
> + ;; fmsub 2: D = -C + (A * B)
This should always arrive as D = (A * B) - C, shouldn't it?
> + ;; fmsub 3: D = - ((-A * B) + C)
Likewise this?
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (neg:SF (plus:SF (mult:SF
> + (neg:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f"))
> + (match_operand:SF 2 "gpc_reg_operand" "f"))
> + (match_operand:SF 3 "gpc_reg_operand" "f"))))]
> + "TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "fmsubs %0,%1,%2,%3"
> + [(set_attr "type" "fp")])
> +
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (neg:SF (plus:SF (mult:SF
> + (neg:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f"))
> + (match_operand:SF 2 "gpc_reg_operand" "f"))
> + (match_operand:SF 3 "gpc_reg_operand" "f"))))]
> + "!TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "{fms|fmsub} %0,%1,%2,%3"
> + [(set_attr "type" "dmul")])
> +
> + ;; fmsub 4: D = - (C - (A * B))
Likewise this?
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (neg:SF (minus:SF (match_operand:SF 3 "gpc_reg_operand" "f")
> + (mult:SF
> + (match_operand:SF 1 "gpc_reg_operand" "%f"
> )
> + (match_operand:SF 2 "gpc_reg_operand" "f")
> ))))]
> + "TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "fmsubs %0,%1,%2,%3"
> + [(set_attr "type" "fp")])
> +
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (neg:SF (minus:SF (match_operand:SF 3 "gpc_reg_operand" "f")
> + (mult:SF
> + (match_operand:SF 1 "gpc_reg_operand" "%f"
> )
> + (match_operand:SF 2 "gpc_reg_operand" "f")
> ))))]
> + "!TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "{fms|fmsub} %0,%1,%2,%3"
> + [(set_attr "type" "dmul")])
> +
> + ;; fnmadd 1: D = - (A * B + C)
> (define_insn ""
> [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> (neg:SF (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f")
> ***************
> *** 4872,4879 ****
> --- 4955,5001 ----
> "{fnma|fnmadd} %0,%1,%2,%3"
> [(set_attr "type" "dmul")])
>
> + ;; fnmadd 2: D = (-A * B) - C
Again, all these should arrive as one pattern, although I'm not sure which.
> (define_insn ""
> [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (minus:SF (mult:SF (neg:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f"))
> + (match_operand:SF 2 "gpc_reg_operand" "f"))
> + (match_operand:SF 3 "gpc_reg_operand" "f")))]
> + "TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "fnmadds %0,%1,%2,%3"
> + [(set_attr "type" "fp")])
> +
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (minus:SF (mult:SF (neg:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f"))
> + (match_operand:SF 2 "gpc_reg_operand" "f"))
> + (match_operand:SF 3 "gpc_reg_operand" "f")))]
> + "!TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "{fnma|fnmadd} %0,%1,%2,%3"
> + [(set_attr "type" "dmul")])
> +
> + ;; fnmadd 3: D = - C - (A * B)
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (minus:SF (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f"))
> + (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
> + (match_operand:SF 2 "gpc_reg_operand" "f"))))]
> + "TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "fnmadds %0,%1,%2,%3"
> + [(set_attr "type" "fp")])
> +
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (minus:SF (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f"))
> + (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
> + (match_operand:SF 2 "gpc_reg_operand" "f"))))]
> + "!TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "{fnma|fnmadd} %0,%1,%2,%3"
> + [(set_attr "type" "dmul")])
> +
> + ;; fnmsub 1: D = - (A * B - C)
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> (neg:SF (minus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f")
> (match_operand:SF 2 "gpc_reg_operand"
> "f"))
> (match_operand:SF 3 "gpc_reg_operand" "f"))))]
> ***************
> *** 4890,4895 ****
> --- 5012,5074 ----
> "{fnms|fnmsub} %0,%1,%2,%3"
> [(set_attr "type" "dmul")])
>
> + ;; fnmsub 2: D = C - (A * B)
... and these likewise.
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (minus:SF (match_operand:SF 3 "gpc_reg_operand" "f")
> + (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
> + (match_operand:SF 2 "gpc_reg_operand" "f"))))]
> + "TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "fnmsubs %0,%1,%2,%3"
> + [(set_attr "type" "fp")])
> +
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (minus:SF (match_operand:SF 3 "gpc_reg_operand" "f")
> + (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
> + (match_operand:SF 2 "gpc_reg_operand" "f"))))]
> + "!TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "{fnms|fnmsub} %0,%1,%2,%3"
> + [(set_attr "type" "dmul")])
> +
> + ;; fnmsub 3: D = - (-C + (A * B))
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (neg:SF (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f")
> + (match_operand:SF 2 "gpc_reg_operand"
> "f"))
> + (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f"
> )))))]
> + "TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "fnmsubs %0,%1,%2,%3"
> + [(set_attr "type" "fp")])
> +
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (neg:SF (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f")
> + (match_operand:SF 2 "gpc_reg_operand"
> "f"))
> + (neg:SF (match_operand:SF 3 "gpc_reg_operand" "f"
> )))))]
> + "!TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "{fnms|fnmsub} %0,%1,%2,%3"
> + [(set_attr "type" "dmul")])
> +
> + ;; fnmsub 4: D = (- A * B) + C
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (plus:SF (mult:SF (neg:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f"))
> + (match_operand:SF 2 "gpc_reg_operand" "f"))
> + (match_operand:SF 3 "gpc_reg_operand" "f")))]
> + "TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "fnmsubs %0,%1,%2,%3"
> + [(set_attr "type" "fp")])
> +
> + (define_insn ""
> + [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
> + (plus:SF (mult:SF (neg:SF (match_operand:SF 1 "gpc_reg_operand"
> "%f"))
> + (match_operand:SF 2 "gpc_reg_operand" "f"))
> + (match_operand:SF 3 "gpc_reg_operand" "f")))]
> + "!TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
> + "{fnms|fnmsub} %0,%1,%2,%3"
> + [(set_attr "type" "dmul")])
> +
> (define_expand "sqrtsf2"
> [(set (match_operand:SF 0 "gpc_reg_operand" "")
> (sqrt:SF (match_operand:SF 1 "gpc_reg_operand" "")))]
>
--
- Geoffrey Keating <geoffk@geoffk.org> <geoffk@redhat.com>