[patch] Fix comment typos in various places.

[Kazu Hirata <kazu at hxi dot com>]

Hi,

Attached is a patch to fix comment typos in various places.  Comitted
as obvious.

Kazu Hirata

2001-10-31  Kazu Hirata  <kazu@hxi.com>

	* builtins.def: Fix comment typos.
	* config/alpha.c: Likewise.
	* config/arm/arm.c: Likewise.
	* config/avr/avr.h: Likewise.
	* config/d30v/d30v.c: Likewise.
	* config/d30v/d30v.h: Likewise.
	* config/d30v/d30v.md: Likewise.
	* config/dsp16xx/dsp16xx.c: Likewise.
	* config/fr30/fr30.c: Likewise.
	* config/fr30/fr30.md: Likewise.
	* config/i386/i386.c: Likewise.
	* config/i860/i860.c: Likewise.
	* config/i960/i960.c: Likewise.
	* config/ia64/ia64.c: Likewise.
	* config/mips/mips.c: Likewise.
	* config/pa/pa.c: Likewise.
	* config/rs6000/rs6000.c: Likewise.
	* config/s390/s390.c: Likewise.
	* config/sparc/sparc.c: Likewise.

Index: builtins.def
===================================================================
RCS file: /cvs/gcc/gcc/gcc/builtins.def,v
retrieving revision 1.22
diff -u -r1.22 builtins.def
--- builtins.def	2001/08/22 14:34:42	1.22
+++ builtins.def	2001/10/31 13:56:18
@@ -72,7 +72,7 @@
 
 /* A library builtin (like __builtin_strchr) is a builtin equivalent
    of an ANSI/ISO standard library function.  In addition to the
-   `__builtin' version, we will create a an ordinary version (e.g,
+   `__builtin' version, we will create an ordinary version (e.g,
    `strchr') as well.  If we cannot compute the answer using the
    builtin function, we will fall back to the standard library
    version. */
Index: config/alpha/alpha.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.c,v
retrieving revision 1.199
diff -u -r1.199 alpha.c
--- alpha.c	2001/10/19 19:34:44	1.199
+++ alpha.c	2001/10/31 13:56:20
@@ -1305,7 +1305,7 @@
   return register_operand (op, mode);
 }
 
-/* Recognize a addition operation that includes a constant.  Used to
+/* Recognize an addition operation that includes a constant.  Used to
    convince reload to canonize (plus (plus reg c1) c2) during register
    elimination.  */
 
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.169
diff -u -r1.169 arm.c
--- arm.c	2001/10/30 14:18:32	1.169
+++ arm.c	2001/10/31 13:56:21
@@ -5219,7 +5219,7 @@
      pushing fixes for forward references, all entries are sorted in order
      of increasing max_address.  */
   HOST_WIDE_INT max_address;
-  /* Similarly for a entry inserted for a backwards ref.  */
+  /* Similarly for an entry inserted for a backwards ref.  */
   HOST_WIDE_INT min_address;
   /* The number of fixes referencing this entry.  This can become zero
      if we "unpush" an entry.  In this case we ignore the entry when we
Index: config/avr/avr.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr.h,v
retrieving revision 1.31
diff -u -r1.31 avr.h
--- avr.h	2001/10/19 19:42:46	1.31
+++ avr.h	2001/10/31 13:56:22
@@ -791,7 +791,7 @@
    class of registers.  In that case, secondary reload registers are
    not needed and would not be helpful.  Instead, a stack location
    must be used to perform the copy and the `movM' pattern should use
-   memory as a intermediate storage.  This case often occurs between
+   memory as an intermediate storage.  This case often occurs between
    floating-point and general registers.  */
 
 /* `SECONDARY_MEMORY_NEEDED (CLASS1, CLASS2, M)'
Index: config/d30v/d30v.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/d30v/d30v.c,v
retrieving revision 1.14
diff -u -r1.14 d30v.c
--- d30v.c	2001/10/07 16:51:09	1.14
+++ d30v.c	2001/10/31 13:56:23
@@ -2461,7 +2461,7 @@
 
 
 /* Called after register allocation to add any instructions needed for
-   the epilogue.  Using a epilogue insn is favored compared to putting
+   the epilogue.  Using an epilogue insn is favored compared to putting
    all of the instructions in output_function_prologue(), since it
    allows the scheduler to intermix instructions with the saves of the
    caller saved registers.  In some cases, it might be necessary to
Index: config/d30v/d30v.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/d30v/d30v.h,v
retrieving revision 1.35
diff -u -r1.35 d30v.h
--- d30v.h	2001/10/28 13:21:59	1.35
+++ d30v.h	2001/10/31 13:56:25
@@ -1649,7 +1649,7 @@
    registers can only be copied to memory and not to another class of
    registers.  In that case, secondary reload registers are not needed and
    would not be helpful.  Instead, a stack location must be used to perform the
-   copy and the `movM' pattern should use memory as a intermediate storage.
+   copy and the `movM' pattern should use memory as an intermediate storage.
    This case often occurs between floating-point and general registers.  */
 
 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X)				\
@@ -1962,7 +1962,7 @@
    value of 4096 is suitable for most systems.  */
 /* #define STACK_CHECK_PROBE_INTERVAL */
 
-/* A integer which is nonzero if GNU CC should perform the stack probe as a
+/* An integer which is nonzero if GNU CC should perform the stack probe as a
    load instruction and zero if GNU CC should use a store instruction.  The
    default is zero, which is the most efficient choice on most systems.  */
 /* #define STACK_CHECK_PROBE_LOAD */
Index: config/d30v/d30v.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/d30v/d30v.md,v
retrieving revision 1.6
diff -u -r1.6 d30v.md
--- d30v.md	2001/07/06 18:40:06	1.6
+++ d30v.md	2001/10/31 13:56:26
@@ -2949,7 +2949,7 @@
 }")
 
 ;; Called after register allocation to add any instructions needed for the
-;; epilogue.  Using a epilogue insn is favored compared to putting all of the
+;; epilogue.  Using an epilogue insn is favored compared to putting all of the
 ;; instructions in output_function_epilogue (), since it allows the scheduler
 ;; to intermix instructions with the saves of the caller saved registers.  In
 ;; some cases, it might be necessary to emit a barrier instruction as the last
Index: config/dsp16xx/dsp16xx.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/dsp16xx/dsp16xx.c,v
retrieving revision 1.19
diff -u -r1.19 dsp16xx.c
--- dsp16xx.c	2001/10/17 04:36:18	1.19
+++ dsp16xx.c	2001/10/31 13:56:26
@@ -2392,7 +2392,7 @@
 
    On the dsp1610 the first four words of args are normally in registers
    and the rest are pushed. If we a long or on float mode, the argument
-   must begin on a even register boundary
+   must begin on an even register boundary
 
    Note that FUNCTION_ARG and FUNCTION_INCOMING_ARG were different.
    For structures that are passed in memory, but could have been
Index: config/fr30/fr30.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.c,v
retrieving revision 1.15
diff -u -r1.15 fr30.c
--- fr30.c	2001/10/28 13:21:59	1.15
+++ fr30.c	2001/10/31 13:56:27
@@ -332,7 +332,7 @@
 }
 
 /* Called after register allocation to add any instructions needed for the
-   epilogue.  Using a epilogue insn is favored compared to putting all of the
+   epilogue.  Using an epilogue insn is favored compared to putting all of the
    instructions in output_function_epilogue(), since it allows the scheduler
    to intermix instructions with the restores of the caller saved registers.
    In some cases, it might be necessary to emit a barrier instruction as the
Index: config/fr30/fr30.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.md,v
retrieving revision 1.9
diff -u -r1.9 fr30.md
--- fr30.md	2001/07/06 18:40:09	1.9
+++ fr30.md	2001/10/31 13:56:27
@@ -1372,7 +1372,7 @@
 )
 
 ;; Called after register allocation to add any instructions needed for the
-;; epilogue.  Using a epilogue insn is favored compared to putting all of the
+;; epilogue.  Using an epilogue insn is favored compared to putting all of the
 ;; instructions in output_function_epilogue(), since it allows the scheduler
 ;; to intermix instructions with the restores of the caller saved registers.
 ;; In some cases, it might be necessary to emit a barrier instruction as the
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.328
diff -u -r1.328 i386.c
--- i386.c	2001/10/28 13:22:00	1.328
+++ i386.c	2001/10/31 13:56:29
@@ -9008,7 +9008,7 @@
   if (GET_CODE (align_exp) == CONST_INT)
     align = INTVAL (align_exp);
 
-  /* This simple hack avoids all inlining code and simplifies code bellow.  */
+  /* This simple hack avoids all inlining code and simplifies code below.  */
   if (!TARGET_ALIGN_STRINGOPS)
     align = 64;
 
@@ -9229,7 +9229,7 @@
   if (GET_CODE (align_exp) == CONST_INT)
     align = INTVAL (align_exp);
 
-  /* This simple hack avoids all inlining code and simplifies code bellow.  */
+  /* This simple hack avoids all inlining code and simplifies code below.  */
   if (!TARGET_ALIGN_STRINGOPS)
     align = 32;
 
Index: config/i860/i860.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i860/i860.c,v
retrieving revision 1.23
diff -u -r1.23 i860.c
--- i860.c	2001/07/07 01:07:19	1.23
+++ i860.c	2001/10/31 13:56:29
@@ -466,7 +466,7 @@
   return (memory_operand (op, mode) || indexed_operand (op, mode));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in add/subtract insns.  */
 
 int
@@ -477,7 +477,7 @@
   return (GET_CODE (op) == CONST_INT && SMALL_INT (op));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in logic insns.  */
 
 int
Index: config/i960/i960.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i960/i960.c,v
retrieving revision 1.30
diff -u -r1.30 i960.c
--- i960.c	2001/10/30 15:01:50	1.30
+++ i960.c	2001/10/31 13:56:30
@@ -183,7 +183,7 @@
   return (register_operand (op, mode) || signed_literal (op, mode));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in three-address insns.  */
 
 int
Index: config/ia64/ia64.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.c,v
retrieving revision 1.124
diff -u -r1.124 ia64.c
--- ia64.c	2001/10/30 14:18:33	1.124
+++ ia64.c	2001/10/31 13:56:32
@@ -2275,7 +2275,7 @@
 }
 
 /* Called after register allocation to add any instructions needed for the
-   epilogue.  Using a epilogue insn is favored compared to putting all of the
+   epilogue.  Using an epilogue insn is favored compared to putting all of the
    instructions in output_function_prologue(), since it allows the scheduler
    to intermix instructions with the saves of the caller saved registers.  In
    some cases, it might be necessary to emit a barrier instruction as the last
Index: config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.157
diff -u -r1.157 mips.c
--- mips.c	2001/10/31 04:08:19	1.157
+++ mips.c	2001/10/31 13:56:33
@@ -509,7 +509,7 @@
   return register_operand (op, mode);
 }
 
-/* Return truth value of whether OP is a integer which fits in 16 bits  */
+/* Return truth value of whether OP is an integer which fits in 16 bits.  */
 
 int
 small_int (op, mode)
Index: config/pa/pa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.c,v
retrieving revision 1.130
diff -u -r1.130 pa.c
--- pa.c	2001/10/28 13:22:01	1.130
+++ pa.c	2001/10/31 13:56:35
@@ -497,7 +497,7 @@
 		  == ((CONST_DOUBLE_LOW (op) & 0x1000) == 0))));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in three-address insns, or
    is an integer register.  */
 
@@ -519,7 +519,7 @@
   return (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32);
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in three-address insns.  */
 
 int
Index: config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.223
diff -u -r1.223 rs6000.c
--- rs6000.c	2001/10/29 21:29:29	1.223
+++ rs6000.c	2001/10/31 13:56:36
@@ -604,7 +604,7 @@
 	  && CONST_OK_FOR_LETTER_P (INTVAL (op), 'I'));
 }
 
-/* Similar for a unsigned D field.  */
+/* Similar for an unsigned D field.  */
 
 int
 u_short_cint_operand (op, mode)
Index: config/s390/s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.13
diff -u -r1.13 s390.c
--- s390.c	2001/10/28 13:22:02	1.13
+++ s390.c	2001/10/31 13:56:37
@@ -1559,8 +1559,8 @@
     'N': print the second word of a DImode operand.
     'M': print the second word of a TImode operand.
 
-    'b': print integer X as if it's a unsigned byte.
-    'x': print integer X as if it's a unsigned word.
+    'b': print integer X as if it's an unsigned byte.
+    'x': print integer X as if it's an unsigned word.
     'h': print integer X as if it's a signed word.  */
 
 void
Index: config/sparc/sparc.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sparc/sparc.c,v
retrieving revision 1.159
diff -u -r1.159 sparc.c
--- sparc.c	2001/10/28 13:22:01	1.159
+++ sparc.c	2001/10/31 13:56:38
@@ -1119,7 +1119,7 @@
 	      && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x200) < 0x400));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in most three-address insns,
    which have a 13 bit immediate field.  */