This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[patch] Add more combine patterns to h8300 port.
- To: gcc-patches at gcc dot gnu dot org
- Subject: [patch] Add more combine patterns to h8300 port.
- From: Kazu Hirata <kazu at hxi dot com>
Hi,
Attached is a patch to add more combine patterns to h8300 port.
The patch saves several instructions in the following code. This kind
of code is not uncommon.
unsigned short
hi (unsigned char m, unsigned char n)
{
return m | ((unsigned short) n << 8);
}
unsigned long
si (unsigned short m, unsigned short n)
{
return m | ((unsigned long) n << 16);
}
.align 1
.global _hi
_hi:
- mov.b r1l,r1h <- original (four insns)
- sub.b r1l,r1l
- or r0l,r1l
- mov.w r1,r0
+ mov.b r1l,r0h <- patched (just ons insn)
rts
.align 1
.global _si
_si:
- mov.w r1,e1 <- original (four insns)
- sub.w r1,r1
- or.w r0,r1
- mov.l er1,er0
+ mov.w r1,e0 <- patched (just one insn)
rts
Tested on h8300 port. OK to apply?
Kazu Hirata
2001-10-30 Kazu Hirata <kazu@hxi.com>
* config/h8300/h8300.md (two anonymous patterns): New.
Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.41
diff -c -r1.41 h8300.md
*** h8300.md 2001/10/26 17:09:33 1.41
--- h8300.md 2001/10/30 20:50:28
***************
*** 2353,2357 ****
--- 2353,2380 ----
(match_operand:SI 2 "register_operand" "0")))]
"REGNO (operands[0]) != REGNO (operands[1])"
"xor\\t%X1,%s0"
+ [(set_attr "cc" "clobber")
+ (set_attr "length" "2")])
+
+ (define_insn ""
+ [(set (match_operand:HI 0 "register_operand" "=r")
+ (ior:HI
+ (zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
+ (ashift:HI (match_operand:HI 2 "register_operand" "r")
+ (const_int 8))))]
+ "REGNO (operands[0]) != REGNO (operands[2])"
+ "mov.b\\t%s2,%t0"
+ [(set_attr "cc" "clobber")
+ (set_attr "length" "2")])
+
+ (define_insn ""
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (ior:SI
+ (zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
+ (ashift:SI (match_operand:SI 2 "register_operand" "r")
+ (const_int 16))))]
+ "(TARGET_H8300H || TARGET_H8300S)
+ && (REGNO (operands[0]) != REGNO (operands[2]))"
+ "mov.w\\t%f2,%e0"
[(set_attr "cc" "clobber")
(set_attr "length" "2")])