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fix ppc warnings


Bootstrapped/regtested ppc.

Sun Jul 29 22:59:58 CEST 2001  Jan Hubicka  <jh@suse.cz>
	* rs6000.md (define_splits): Kill unused constraints.
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.120
diff -c -3 -p -r1.120 rs6000.md
*** rs6000.md	2001/07/04 17:43:18	1.120
--- rs6000.md	2001/07/29 14:25:25
***************
*** 1965,1973 ****
    [(set_attr "length" "12")])
  
  (define_split
!   [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
! 	(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0"))))
!    (clobber (match_scratch:SI 2 "=&r,&r"))]
    "! TARGET_POWER && reload_completed"
    [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
     (set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
--- 1965,1973 ----
    [(set_attr "length" "12")])
  
  (define_split
!   [(set (match_operand:SI 0 "gpc_reg_operand" "")
! 	(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" ""))))
!    (clobber (match_scratch:SI 2 ""))]
    "! TARGET_POWER && reload_completed"
    [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
     (set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
***************
*** 2749,2756 ****
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(match_operand:SI 1 "gpc_reg_operand" "%r,r")
! 	  (match_operand:SI 2 "gpc_reg_operand" "r,r")])
  	 (const_int 0)))
     (clobber (match_scratch:SI 3 ""))]
    "! TARGET_POWERPC64 && reload_completed"
--- 2749,2756 ----
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(match_operand:SI 1 "gpc_reg_operand" "")
! 	  (match_operand:SI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
     (clobber (match_scratch:SI 3 ""))]
    "! TARGET_POWERPC64 && reload_completed"
***************
*** 2776,2787 ****
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(match_operand:SI 1 "gpc_reg_operand" "%r,r")
! 	  (match_operand:SI 2 "gpc_reg_operand" "r,r")])
  	 (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
  	(match_dup 4))]
    "! TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
--- 2776,2787 ----
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(match_operand:SI 1 "gpc_reg_operand" "")
! 	  (match_operand:SI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "")
  	(match_dup 4))]
    "! TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
***************
*** 2837,2844 ****
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
! 	  (match_operand:SI 2 "gpc_reg_operand" "r")])
  	 (const_int 0)))
     (clobber (match_scratch:SI 3 ""))]
    "! TARGET_POWERPC64 && reload_completed"
--- 2837,2844 ----
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
! 	  (match_operand:SI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
     (clobber (match_scratch:SI 3 ""))]
    "! TARGET_POWERPC64 && reload_completed"
***************
*** 2864,2875 ****
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
! 	  (match_operand:SI 2 "gpc_reg_operand" "r,r")])
  	 (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
  	(match_dup 4))]
    "! TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
--- 2864,2875 ----
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
! 	  (match_operand:SI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "")
  	(match_dup 4))]
    "! TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
***************
*** 2903,2910 ****
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
! 	  (not:SI (match_operand:SI 2 "gpc_reg_operand" "r"))])
  	 (const_int 0)))
     (clobber (match_scratch:SI 3 ""))]
    "! TARGET_POWERPC64 && reload_completed"
--- 2903,2910 ----
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
! 	  (not:SI (match_operand:SI 2 "gpc_reg_operand" ""))])
  	 (const_int 0)))
     (clobber (match_scratch:SI 3 ""))]
    "! TARGET_POWERPC64 && reload_completed"
***************
*** 2930,2941 ****
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
! 	  (not:SI (match_operand:SI 2 "gpc_reg_operand" "r,r"))])
  	 (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
  	(match_dup 4))]
    "! TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
--- 2930,2941 ----
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "")
  	(compare:CC (match_operator:SI 4 "boolean_operator"
! 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
! 	  (not:SI (match_operand:SI 2 "gpc_reg_operand" ""))])
  	 (const_int 0)))
!    (set (match_operand:SI 0 "gpc_reg_operand" "")
  	(match_dup 4))]
    "! TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
***************
*** 5209,5220 ****
  
  (define_split
    [(set (match_operand:SI 0 "gpc_reg_operand" "")
! 	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))
     (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
     (clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
    "(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT"
    [(set (match_operand:SI 0 "gpc_reg_operand" "")
! 	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))
     (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
     (clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
    "
--- 5209,5220 ----
  
  (define_split
    [(set (match_operand:SI 0 "gpc_reg_operand" "")
! 	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
     (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
     (clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
    "(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT"
    [(set (match_operand:SI 0 "gpc_reg_operand" "")
! 	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
     (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
     (clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
    "
***************
*** 5867,5875 ****
    [(set_attr "length" "12")])
  
  (define_split
!   [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
! 	(abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0")))
!    (clobber (match_scratch:DI 2 "=&r,&r"))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
     (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
--- 5867,5875 ----
    [(set_attr "length" "12")])
  
  (define_split
!   [(set (match_operand:DI 0 "gpc_reg_operand" "")
! 	(abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))
!    (clobber (match_scratch:DI 2 ""))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
     (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
***************
*** 5885,5893 ****
    [(set_attr "length" "12")])
  
  (define_split
!   [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
! 	(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
!    (clobber (match_scratch:DI 2 "=&r,&r"))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
     (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
--- 5885,5893 ----
    [(set_attr "length" "12")])
  
  (define_split
!   [(set (match_operand:DI 0 "gpc_reg_operand" "")
! 	(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))))
!    (clobber (match_scratch:DI 2 ""))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
     (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
***************
*** 6975,6982 ****
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(match_operand:DI 1 "gpc_reg_operand" "%r,r")
! 	  (match_operand:DI 2 "gpc_reg_operand" "r,r")])
  	 (const_int 0)))
     (clobber (match_scratch:DI 3 ""))]
    "TARGET_POWERPC64 && reload_completed"
--- 6975,6982 ----
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(match_operand:DI 1 "gpc_reg_operand" "")
! 	  (match_operand:DI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
     (clobber (match_scratch:DI 3 ""))]
    "TARGET_POWERPC64 && reload_completed"
***************
*** 7002,7013 ****
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(match_operand:DI 1 "gpc_reg_operand" "%r,r")
! 	  (match_operand:DI 2 "gpc_reg_operand" "r,r")])
  	 (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
  	(match_dup 4))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
--- 7002,7013 ----
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(match_operand:DI 1 "gpc_reg_operand" "")
! 	  (match_operand:DI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "")
  	(match_dup 4))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
***************
*** 7075,7082 ****
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
! 	  (match_operand:DI 2 "gpc_reg_operand" "r")])
  	 (const_int 0)))
     (clobber (match_scratch:DI 3 ""))]
    "TARGET_POWERPC64 && reload_completed"
--- 7075,7082 ----
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
! 	  (match_operand:DI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
     (clobber (match_scratch:DI 3 ""))]
    "TARGET_POWERPC64 && reload_completed"
***************
*** 7102,7113 ****
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
! 	  (match_operand:DI 2 "gpc_reg_operand" "r,r")])
  	 (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
  	(match_dup 4))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
--- 7102,7113 ----
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
! 	  (match_operand:DI 2 "gpc_reg_operand" "")])
  	 (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "")
  	(match_dup 4))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
***************
*** 7141,7148 ****
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
! 	  (not:DI (match_operand:DI 2 "gpc_reg_operand" "r"))])
  	 (const_int 0)))
     (clobber (match_scratch:DI 3 ""))]
    "TARGET_POWERPC64 && reload_completed"
--- 7141,7148 ----
  (define_split
    [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
! 	  (not:DI (match_operand:DI 2 "gpc_reg_operand" ""))])
  	 (const_int 0)))
     (clobber (match_scratch:DI 3 ""))]
    "TARGET_POWERPC64 && reload_completed"
***************
*** 7168,7179 ****
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
! 	  (not:DI (match_operand:DI 2 "gpc_reg_operand" "r,r"))])
  	 (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
  	(match_dup 4))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
--- 7168,7179 ----
     (set_attr "length" "4,8")])
  
  (define_split
!   [(set (match_operand:CC 3 "cc_reg_operand" "")
  	(compare:CC (match_operator:DI 4 "boolean_operator"
! 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
! 	  (not:DI (match_operand:DI 2 "gpc_reg_operand" ""))])
  	 (const_int 0)))
!    (set (match_operand:DI 0 "gpc_reg_operand" "")
  	(match_dup 4))]
    "TARGET_POWERPC64 && reload_completed"
    [(set (match_dup 0) (match_dup 4))
***************
*** 7258,7266 ****
  ;; Used by sched, shorten_branches and final when the GOT pseudo reg
  ;; didn't get allocated to a hard register.
  (define_split 
!   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
  	(unspec:SI [(match_operand:SI 1 "got_no_const_operand" "")
! 		    (match_operand:SI 2 "memory_operand" "m")] 8))]
    "(DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
      && flag_pic == 1
      && (reload_in_progress || reload_completed)"
--- 7258,7266 ----
  ;; Used by sched, shorten_branches and final when the GOT pseudo reg
  ;; didn't get allocated to a hard register.
  (define_split 
!   [(set (match_operand:SI 0 "gpc_reg_operand" "")
  	(unspec:SI [(match_operand:SI 1 "got_no_const_operand" "")
! 		    (match_operand:SI 2 "memory_operand" "")] 8))]
    "(DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
      && flag_pic == 1
      && (reload_in_progress || reload_completed)"


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