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[PATCH] PPC build warning fixes


Hi,

Just a couple of warning fixes, tested on powerpc-linux-gnu.

OK to commit?

Just out of interest, why is genrecog walking into UNSPEC, but not into 
COMPARE?

Franz.

	* config/rs6000/rs6000.c: Include integrate.h to silence  warnings.
	* config/rs6000/rs6000.md:  Silence  genrecog define_split warnings.

Index: gcc/config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.193
diff -u -p -r1.193 rs6000.c
--- gcc/config/rs6000/rs6000.c	2001/07/11 20:35:54	1.193
+++ gcc/config/rs6000/rs6000.c	2001/07/21 22:42:04
@@ -38,6 +38,7 @@ Boston, MA 02111-1307, USA.  */
 #include "function.h"
 #include "output.h"
 #include "basic-block.h"
+#include "integrate.h"
 #include "toplev.h"
 #include "ggc.h"
 #include "hashtab.h"
Index: gcc/config/rs6000/rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.120
diff -u -p -r1.120 rs6000.md
--- gcc/config/rs6000/rs6000.md	2001/07/04 17:43:18	1.120
+++ gcc/config/rs6000/rs6000.md	2001/07/21 22:42:08
@@ -1597,7 +1597,7 @@
   [(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
 	(compare:CC (not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
 		    (const_int 0)))
-   (set (match_operand:SI 0 "gpc_reg_operand" "=r")
+   (set (match_operand:SI 0 "gpc_reg_operand" "")
 	(not:SI (match_dup 1)))]
   "! TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 0)
@@ -1936,8 +1936,8 @@
   [(set_attr "length" "12")])
 
 (define_split
-  [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
-	(abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0")))
+  [(set (match_operand:SI 0 "gpc_reg_operand" "")
+	(abs:SI (match_operand:SI 1 "gpc_reg_operand" "")))
    (clobber (match_scratch:SI 2 "=&r,&r"))]
   "! TARGET_POWER && reload_completed"
   [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
@@ -1965,8 +1965,8 @@
   [(set_attr "length" "12")])
 
 (define_split
-  [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
-	(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0"))))
+  [(set (match_operand:SI 0 "gpc_reg_operand" "")
+	(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" ""))))
    (clobber (match_scratch:SI 2 "=&r,&r"))]
   "! TARGET_POWER && reload_completed"
   [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
@@ -2776,12 +2776,12 @@
    (set_attr "length" "4,8")])
 
 (define_split
-  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+  [(set (match_operand:CC 3 "cc_reg_operand" "")
 	(compare:CC (match_operator:SI 4 "boolean_operator"
 	 [(match_operand:SI 1 "gpc_reg_operand" "%r,r")
 	  (match_operand:SI 2 "gpc_reg_operand" "r,r")])
 	 (const_int 0)))
-   (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
+   (set (match_operand:SI 0 "gpc_reg_operand" "")
 	(match_dup 4))]
   "! TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 0) (match_dup 4))
@@ -2864,12 +2864,12 @@
    (set_attr "length" "4,8")])
 
 (define_split
-  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+  [(set (match_operand:CC 3 "cc_reg_operand" "")
 	(compare:CC (match_operator:SI 4 "boolean_operator"
 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
 	  (match_operand:SI 2 "gpc_reg_operand" "r,r")])
 	 (const_int 0)))
-   (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
+   (set (match_operand:SI 0 "gpc_reg_operand" "")
 	(match_dup 4))]
   "! TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 0) (match_dup 4))
@@ -2930,12 +2930,12 @@
    (set_attr "length" "4,8")])
 
 (define_split
-  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+  [(set (match_operand:CC 3 "cc_reg_operand" "")
 	(compare:CC (match_operator:SI 4 "boolean_operator"
 	 [(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
 	  (not:SI (match_operand:SI 2 "gpc_reg_operand" "r,r"))])
 	 (const_int 0)))
-   (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
+   (set (match_operand:SI 0 "gpc_reg_operand" "")
 	(match_dup 4))]
   "! TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 0) (match_dup 4))
@@ -5209,7 +5209,7 @@
 
 (define_split
   [(set (match_operand:SI 0 "gpc_reg_operand" "")
-	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))
+	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
    (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
    (clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
   "(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT"
@@ -5867,8 +5867,8 @@
   [(set_attr "length" "12")])
 
 (define_split
-  [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
-	(abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0")))
+  [(set (match_operand:DI 0 "gpc_reg_operand" "")
+	(abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))
    (clobber (match_scratch:DI 2 "=&r,&r"))]
   "TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
@@ -5885,8 +5885,8 @@
   [(set_attr "length" "12")])
 
 (define_split
-  [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
-	(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
+  [(set (match_operand:DI 0 "gpc_reg_operand" "")
+	(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))))
    (clobber (match_scratch:DI 2 "=&r,&r"))]
   "TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
@@ -7002,12 +7002,12 @@
    (set_attr "length" "4,8")])
 
 (define_split
-  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+  [(set (match_operand:CC 3 "cc_reg_operand" "")
 	(compare:CC (match_operator:DI 4 "boolean_operator"
 	 [(match_operand:DI 1 "gpc_reg_operand" "%r,r")
 	  (match_operand:DI 2 "gpc_reg_operand" "r,r")])
 	 (const_int 0)))
-   (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
+   (set (match_operand:DI 0 "gpc_reg_operand" "")
 	(match_dup 4))]
   "TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 0) (match_dup 4))
@@ -7102,12 +7102,12 @@
    (set_attr "length" "4,8")])
 
 (define_split
-  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+  [(set (match_operand:CC 3 "cc_reg_operand" "")
 	(compare:CC (match_operator:DI 4 "boolean_operator"
 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
 	  (match_operand:DI 2 "gpc_reg_operand" "r,r")])
 	 (const_int 0)))
-   (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
+   (set (match_operand:DI 0 "gpc_reg_operand" "")
 	(match_dup 4))]
   "TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 0) (match_dup 4))
@@ -7168,12 +7168,12 @@
    (set_attr "length" "4,8")])
 
 (define_split
-  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+  [(set (match_operand:CC 3 "cc_reg_operand" "")
 	(compare:CC (match_operator:DI 4 "boolean_operator"
 	 [(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
 	  (not:DI (match_operand:DI 2 "gpc_reg_operand" "r,r"))])
 	 (const_int 0)))
-   (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
+   (set (match_operand:DI 0 "gpc_reg_operand" "")
 	(match_dup 4))]
   "TARGET_POWERPC64 && reload_completed"
   [(set (match_dup 0) (match_dup 4))
@@ -7258,9 +7258,9 @@
 ;; Used by sched, shorten_branches and final when the GOT pseudo reg
 ;; didn't get allocated to a hard register.
 (define_split 
-  [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
+  [(set (match_operand:SI 0 "gpc_reg_operand" "")
 	(unspec:SI [(match_operand:SI 1 "got_no_const_operand" "")
-		    (match_operand:SI 2 "memory_operand" "m")] 8))]
+		    (match_operand:SI 2 "memory_operand" "")] 8))]
   "(DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
     && flag_pic == 1
     && (reload_in_progress || reload_completed)"


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