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MEM tracking, round 3
- To: gcc-patches at gcc dot gnu dot org
- Subject: MEM tracking, round 3
- From: kenner at vlsi1 dot ultra dot nyu dot edu (Richard Kenner)
- Date: Tue, 3 Jul 01 15:50:51 EDT
This removes the adj_offsettable_operand, makes sure that plus_constant
can handle the cases it did, and replaces calls to it with calls to
adjust_address. Tested with bootstrap on alphaev56 and with compilations
of several cross-compilers, but typos are a real possibility here.
Tue Jul 3 15:35:52 2001 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* explow.c (plus_constant_wide, case PLUS): Call find_constant_term
and avoid checking for constant as first operand.
* recog.c (find_constant_term_loc): No longer static.
(adj_offettable_operand): Delete.
* rtl.h (adj_offsettable_operand): Delete declaration.
(find_constant_term): Add declaration.
* caller-save.c: Replace calls to adj_offsettable_operand with calls
to adjust_address.
* config/arm/arm.c, config/c4x/c4x.c: Likewise.
* config/clipper/clipper.md, config/h8300/h8300.c: Likewise.
* config/i386/i386.c, config/i386/i386.md: Likewise.
* config/i860/i860.c, config/i960/i960.c: Likewise.
* config/i960/i960.md, config/m68hc11/m68hc11.c: Likewise.
* config/m68k/m68k.c, config/m68k/m68k.md: Likewise.
* config/m88k/m88k.md, config/mcore/mcore.c: Likewise.
* config/mips/mips.c, config/mips/mips.md: Likewise.
* config/mn10200/mn10200.c, config/mn10300/mn10300.c: Likewise.
* config/ns32k/ns32k.c, config/ns32k/ns32k.md: Likewise.
* config/pa/pa.c, config/pdp11/pdp11.c: Likewise.
* config/pdp11/pdp11.md, config/sh/sh.c, config/v850/v850.c: Likewise.
* config/vax/vax.md, config/ns32k/ns32k.c: Likewise.
* config/ns32k/ns32k.md: Likewise.
*** caller-save.c 2001/07/02 19:47:39 1.37
--- caller-save.c 2001/07/03 14:04:38
*************** setup_save_areas ()
*** 330,342 ****
/* Setup single word save area just in case... */
for (k = 0; k < j; k++)
! {
! /* This should not depend on WORDS_BIG_ENDIAN.
! The order of words in regs is the same as in memory. */
! rtx temp = gen_rtx_MEM (regno_save_mode[i + k][1],
! XEXP (regno_save_mem[i][j], 0));
!
! regno_save_mem[i + k][1]
! = adj_offsettable_operand (temp, k * UNITS_PER_WORD);
! }
}
--- 330,338 ----
/* Setup single word save area just in case... */
for (k = 0; k < j; k++)
! /* This should not depend on WORDS_BIG_ENDIAN.
! The order of words in regs is the same as in memory. */
! regno_save_mem[i + k][1]
! = adjust_address (regno_save_mem[i][j], regno_save_mode[i + k][1],
! k * UNITS_PER_WORD);
}
*** explow.c 2001/07/03 01:58:33 1.64
--- explow.c 2001/07/03 14:04:41
*************** plus_constant_wide (x, c)
*** 79,82 ****
--- 79,83 ----
{
register RTX_CODE code;
+ rtx y = x;
register enum machine_mode mode;
register rtx tem;
*************** plus_constant_wide (x, c)
*** 160,175 ****
goto restart;
}
! else if (CONSTANT_P (XEXP (x, 0)))
{
! x = gen_rtx_PLUS (mode,
! plus_constant (XEXP (x, 0), c),
! XEXP (x, 1));
c = 0;
}
! else if (CONSTANT_P (XEXP (x, 1)))
{
! x = gen_rtx_PLUS (mode,
! XEXP (x, 0),
! plus_constant (XEXP (x, 1), c));
c = 0;
}
--- 161,178 ----
goto restart;
}
! else if (CONSTANT_P (XEXP (x, 1)))
{
! x = gen_rtx_PLUS (mode, XEXP (x, 0), plus_constant (XEXP (x, 1), c));
c = 0;
}
! else if (find_constant_term_loc (&y))
{
! /* We need to be careful since X may be shared and we can't
! modify it in place. */
! rtx copy = copy_rtx (x);
! rtx *const_loc = find_constant_term_loc (©);
!
! *const_loc = plus_constant (*const_loc, c);
! x = copy;
c = 0;
}
*** recog.c 2001/07/03 01:58:34 1.110
--- recog.c 2001/07/03 14:04:47
*************** Boston, MA 02111-1307, USA. */
*** 56,60 ****
static void validate_replace_rtx_1 PARAMS ((rtx *, rtx, rtx, rtx));
static rtx *find_single_use_1 PARAMS ((rtx, rtx *));
- static rtx *find_constant_term_loc PARAMS ((rtx *));
static void validate_replace_src_1 PARAMS ((rtx *, void *));
static rtx split_insn PARAMS ((rtx));
--- 56,59 ----
*************** asm_operand_ok (op, constraint)
*** 1830,1834 ****
Otherwise, return a null pointer. */
! static rtx *
find_constant_term_loc (p)
rtx *p;
--- 1829,1833 ----
Otherwise, return a null pointer. */
! rtx *
find_constant_term_loc (p)
rtx *p;
*************** mode_independent_operand (op, mode)
*** 2015,2064 ****
lose: ATTRIBUTE_UNUSED_LABEL
return 0;
- }
-
- /* Given an operand OP that is a valid memory reference which
- satisfies offsettable_memref_p, return a new memory reference whose
- address has been adjusted by OFFSET. OFFSET should be positive and
- less than the size of the object referenced. */
-
- rtx
- adj_offsettable_operand (op, offset)
- rtx op;
- int offset;
- {
- register enum rtx_code code = GET_CODE (op);
-
- if (code == MEM)
- {
- register rtx y = XEXP (op, 0);
- register rtx new;
-
- if (CONSTANT_ADDRESS_P (y))
- {
- new = gen_rtx_MEM (GET_MODE (op), plus_constant (y, offset));
- MEM_COPY_ATTRIBUTES (new, op);
- return new;
- }
-
- if (GET_CODE (y) == PLUS)
- {
- rtx z = y;
- register rtx *const_loc;
-
- op = copy_rtx (op);
- z = XEXP (op, 0);
- const_loc = find_constant_term_loc (&z);
- if (const_loc)
- {
- *const_loc = plus_constant (*const_loc, offset);
- return op;
- }
- }
-
- new = gen_rtx_MEM (GET_MODE (op), plus_constant (y, offset));
- MEM_COPY_ATTRIBUTES (new, op);
- return new;
- }
- abort ();
}
--- 2014,2017 ----
*** rtl.h 2001/07/03 01:58:33 1.267
--- rtl.h 2001/07/03 14:04:51
*************** extern rtx follow_jumps PARAMS ((rtx))
*** 1296,1300 ****
/* In recog.c */
! extern rtx adj_offsettable_operand PARAMS ((rtx, int));
/* In emit-rtl.c */
--- 1296,1300 ----
/* In recog.c */
! extern rtx *find_constant_term_loc PARAMS ((rtx *));
/* In emit-rtl.c */
*** config/arm/arm.c 2001/07/03 01:58:34 1.151
--- config/arm/arm.c 2001/07/03 14:05:09
*************** output_move_double (operands)
*** 6570,6574 ****
else
{
! otherops[1] = adj_offsettable_operand (operands[1], 4);
/* Take care of overlapping base/data reg. */
if (reg_mentioned_p (operands[0], operands[1]))
--- 6570,6574 ----
else
{
! otherops[1] = adjust_address (operands[1], VOIDmode, 4);
/* Take care of overlapping base/data reg. */
if (reg_mentioned_p (operands[0], operands[1]))
*************** output_move_double (operands)
*** 6636,6640 ****
default:
! otherops[0] = adj_offsettable_operand (operands[0], 4);
otherops[1] = gen_rtx_REG (SImode, 1 + REGNO (operands[1]));
output_asm_insn ("str%?\t%1, %0", operands);
--- 6636,6640 ----
default:
! otherops[0] = adjust_address (operands[0], VOIDmode, 4);
otherops[1] = gen_rtx_REG (SImode, 1 + REGNO (operands[1]));
output_asm_insn ("str%?\t%1, %0", operands);
*** config/c4x/c4x.c 2001/06/26 18:08:36 1.83
--- config/c4x/c4x.c 2001/07/03 14:05:16
*************** c4x_print_operand (file, op, letter)
*** 1922,1926 ****
{
asm_fprintf (file, "\t%s\t@", TARGET_C3X ? "ldp" : "ldpk");
! output_address (XEXP (adj_offsettable_operand (op, 1), 0));
asm_fprintf (file, "\n");
}
--- 1922,1926 ----
{
asm_fprintf (file, "\t%s\t@", TARGET_C3X ? "ldp" : "ldpk");
! output_address (XEXP (adjust_address (op, VOIDmodem, 1), 0));
asm_fprintf (file, "\n");
}
*************** c4x_print_operand (file, op, letter)
*** 1944,1948 ****
break;
else if (code == MEM)
! output_address (XEXP (adj_offsettable_operand (op, 1), 0));
else if (code == REG)
fprintf (file, "%s", reg_names[REGNO (op) + 1]);
--- 1944,1948 ----
break;
else if (code == MEM)
! output_address (XEXP (adjust_address (op, 1), VOIDmode, 0));
else if (code == REG)
fprintf (file, "%s", reg_names[REGNO (op) + 1]);
*** config/clipper/clipper.md 2000/08/08 22:40:49 1.5
--- config/clipper/clipper.md 2001/07/03 14:05:18
***************
*** 182,186 ****
xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xops[2] = operands[1];
! xops[3] = adj_offsettable_operand (operands[1], 4);
output_asm_insn (\"loadw %2,%0\;loadw %3,%1\", xops);
return \"\";
--- 182,186 ----
xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xops[2] = operands[1];
! xops[3] = adjust_address (operands[1], SImode, 4);
output_asm_insn (\"loadw %2,%0\;loadw %3,%1\", xops);
return \"\";
***************
*** 215,219 ****
xops[0] = operands[0]; /* r -> o */
! xops[1] = adj_offsettable_operand (operands[0], 4);
xops[2] = operands[1];
xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
--- 215,219 ----
xops[0] = operands[0]; /* r -> o */
! xops[1] = adjust_address (operands[0], SImode, 4);
xops[2] = operands[1];
xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
***************
*** 351,355 ****
/* m -> r */
output_asm_insn (\"loadw %1,%0\", operands);
! xoperands[1] = adj_offsettable_operand (operands[1], 4);
output_asm_insn (\"loadw %1,%0\", xoperands);
return \"\";
--- 351,355 ----
/* m -> r */
output_asm_insn (\"loadw %1,%0\", operands);
! xoperands[1] = adjust_address (operands[1], SImode, 4);
output_asm_insn (\"loadw %1,%0\", xoperands);
return \"\";
***************
*** 366,370 ****
rtx xops[4];
xops[0] = operands[0];
! xops[1] = adj_offsettable_operand (operands[0], 4);
xops[2] = operands[1];
xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
--- 366,370 ----
rtx xops[4];
xops[0] = operands[0];
! xops[1] = adjust_address (operands[0], SImode, 4);
xops[2] = operands[1];
xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
*** config/h8300/h8300.c 2001/06/26 18:08:43 1.57
--- config/h8300/h8300.c 2001/07/03 14:05:23
*************** print_operand (file, x, code)
*** 1191,1195 ****
break;
case MEM:
- x = adj_offsettable_operand (x, 0);
print_operand (file, x, 0);
break;
--- 1191,1194 ----
*************** print_operand (file, x, code)
*** 1221,1225 ****
break;
case MEM:
! x = adj_offsettable_operand (x, 2);
print_operand (file, x, 0);
break;
--- 1220,1224 ----
break;
case MEM:
! x = adjust_address (x, HImode, 2);
print_operand (file, x, 0);
break;
*** config/i386/i386.c 2001/07/03 05:56:32 1.275
--- config/i386/i386.c 2001/07/03 14:05:38
*************** ix86_emit_save_regs_using_mov (pointer,
*** 2494,2500 ****
if (ix86_save_reg (regno, true))
{
! insn = emit_move_insn (adj_offsettable_operand (gen_rtx_MEM (Pmode,
! pointer),
! offset),
gen_rtx_REG (Pmode, regno));
RTX_FRAME_RELATED_P (insn) = 1;
--- 2494,2499 ----
if (ix86_save_reg (regno, true))
{
! insn = emit_move_insn (adjust_address (gen_rtx_MEM (Pmode, pointer),
! Pmode, offset),
gen_rtx_REG (Pmode, regno));
RTX_FRAME_RELATED_P (insn) = 1;
*************** ix86_emit_restore_regs_using_mov (pointe
*** 2607,2613 ****
{
emit_move_insn (gen_rtx_REG (Pmode, regno),
! adj_offsettable_operand (gen_rtx_MEM (Pmode,
! pointer),
! offset));
offset += UNITS_PER_WORD;
}
--- 2606,2611 ----
{
emit_move_insn (gen_rtx_REG (Pmode, regno),
! adjust_address (gen_rtx_MEM (Pmode, pointer),
! Pmode, offset));
offset += UNITS_PER_WORD;
}
*************** split_di (operands, num, lo_half, hi_hal
*** 4412,4419 ****
else if (offsettable_memref_p (op))
{
- rtx hi_addr = XEXP (adj_offsettable_operand (op, 4), 0);
-
lo_half[num] = adjust_address (op, SImode, 0);
! hi_half[num] = change_address (op, SImode, hi_addr);
}
else
--- 4410,4415 ----
else if (offsettable_memref_p (op))
{
lo_half[num] = adjust_address (op, SImode, 0);
! hi_half[num] = adjust_address (op, SImode, 4);
}
else
*************** ix86_split_to_parts (operand, parts, mod
*** 6871,6877 ****
operand = adjust_address (operand, SImode, 0);
parts[0] = operand;
! parts[1] = adj_offsettable_operand (operand, 4);
if (size == 3)
! parts[2] = adj_offsettable_operand (operand, 8);
}
else if (GET_CODE (operand) == CONST_DOUBLE)
--- 6867,6873 ----
operand = adjust_address (operand, SImode, 0);
parts[0] = operand;
! parts[1] = adjust_address (operand, SImode, 4);
if (size == 3)
! parts[2] = adjust_address (operand, SImode, 8);
}
else if (GET_CODE (operand) == CONST_DOUBLE)
*************** ix86_split_to_parts (operand, parts, mod
*** 6914,6921 ****
else if (offsettable_memref_p (operand))
{
! operand = change_address (operand, DImode, XEXP (operand, 0));
parts[0] = operand;
! parts[1] = adj_offsettable_operand (operand, 8);
! parts[1] = change_address (parts[1], SImode, XEXP (parts[1], 0));
}
else if (GET_CODE (operand) == CONST_DOUBLE)
--- 6910,6916 ----
else if (offsettable_memref_p (operand))
{
! operand = adjust_address (operand, DImode, 0);
parts[0] = operand;
! parts[1] = adjust_address (operand, SImode, 8);
}
else if (GET_CODE (operand) == CONST_DOUBLE)
*************** ix86_split_long_move (operands)
*** 7032,7041 ****
TARGET_64BIT ? DImode : SImode,
part[0][nparts - 1]);
! part[1][1] = adj_offsettable_operand (part[1][0],
! UNITS_PER_WORD);
! part[1][1] = change_address (part[1][1], GET_MODE (part[0][1]),
! XEXP (part[1][1], 0));
if (nparts == 3)
! part[1][2] = adj_offsettable_operand (part[1][0], 8);
}
}
--- 7027,7033 ----
TARGET_64BIT ? DImode : SImode,
part[0][nparts - 1]);
! part[1][1] = adjust_address (part[1][0], VOIDmode, UNITS_PER_WORD);
if (nparts == 3)
! part[1][2] = adjust_address (part[1][0], VOIDmode, 8);
}
}
*************** ix86_expand_builtin (exp, target, subtar
*** 10198,10213 ****
case IX86_BUILTIN_SETPS:
target = assign_386_stack_local (V4SFmode, 0);
- op0 = adjust_address (target, SFmode, 0);
arg0 = TREE_VALUE (arglist);
arg1 = TREE_VALUE (TREE_CHAIN (arglist));
arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
arg3 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (TREE_CHAIN (arglist))));
! emit_move_insn (op0,
expand_expr (arg0, NULL_RTX, VOIDmode, 0));
! emit_move_insn (adj_offsettable_operand (op0, 4),
expand_expr (arg1, NULL_RTX, VOIDmode, 0));
! emit_move_insn (adj_offsettable_operand (op0, 8),
expand_expr (arg2, NULL_RTX, VOIDmode, 0));
! emit_move_insn (adj_offsettable_operand (op0, 12),
expand_expr (arg3, NULL_RTX, VOIDmode, 0));
op0 = gen_reg_rtx (V4SFmode);
--- 10190,10204 ----
case IX86_BUILTIN_SETPS:
target = assign_386_stack_local (V4SFmode, 0);
arg0 = TREE_VALUE (arglist);
arg1 = TREE_VALUE (TREE_CHAIN (arglist));
arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
arg3 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (TREE_CHAIN (arglist))));
! emit_move_insn (adjust_address (op0, SFmode, 0),
expand_expr (arg0, NULL_RTX, VOIDmode, 0));
! emit_move_insn (adjust_address (op0, SFmode, 4),
expand_expr (arg1, NULL_RTX, VOIDmode, 0));
! emit_move_insn (adjust_address (op0, SFmode, 8),
expand_expr (arg2, NULL_RTX, VOIDmode, 0));
! emit_move_insn (adjust_address (op0, SFmode, 12),
expand_expr (arg3, NULL_RTX, VOIDmode, 0));
op0 = gen_reg_rtx (V4SFmode);
*** config/i386/i386.md 2001/07/02 19:47:41 1.283
--- config/i386/i386.md 2001/07/03 14:06:15
***************
*** 9385,9390 ****
if (size >= 12)
size = 10;
! operands[0] = gen_rtx_MEM (QImode, XEXP (operands[0], 0));
! operands[0] = adj_offsettable_operand (operands[0], size - 1);
operands[1] = GEN_INT (trunc_int_for_mode (0x80, QImode));
})
--- 9385,9389 ----
if (size >= 12)
size = 10;
! operands[0] = adjust_address (operands[0], QImode, size - 1);
operands[1] = GEN_INT (trunc_int_for_mode (0x80, QImode));
})
***************
*** 9838,9843 ****
if (size >= 12)
size = 10;
! operands[0] = gen_rtx_MEM (QImode, XEXP (operands[0], 0));
! operands[0] = adj_offsettable_operand (operands[0], size - 1);
operands[1] = GEN_INT (trunc_int_for_mode (~0x80, QImode));
})
--- 9837,9841 ----
if (size >= 12)
size = 10;
! operands[0] = adjust_address (operands[0], QImode, size - 1);
operands[1] = GEN_INT (trunc_int_for_mode (~0x80, QImode));
})
*** config/i860/i860.c 2001/06/26 18:08:50 1.20
--- config/i860/i860.c 2001/07/03 14:06:21
*************** output_move_double (operands)
*** 644,648 ****
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
--- 644,648 ----
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adjust_address (operands[0], SImode, 4);
else
latehalf[0] = operands[0];
*************** output_move_double (operands)
*** 651,655 ****
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
{
--- 651,655 ----
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adjust_address (operands[1], SImode, 4);
else if (optype1 == CNSTOP)
{
*************** output_move_double (operands)
*** 709,713 ****
output_asm_insn ("adds %1,%0,%1", xops);
operands[1] = gen_rtx_MEM (DImode, operands[0]);
! latehalf[1] = adj_offsettable_operand (operands[1], 4);
addreg1 = 0;
highest_first = 1;
--- 709,713 ----
output_asm_insn ("adds %1,%0,%1", xops);
operands[1] = gen_rtx_MEM (DImode, operands[0]);
! latehalf[1] = adjust_address (operands[1], SImode, 4);
addreg1 = 0;
highest_first = 1;
*** config/i960/i960.c 2001/06/26 18:08:51 1.24
--- config/i960/i960.c 2001/07/03 14:06:26
*************** i960_output_move_double (dst, src)
*** 591,596 ****
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 1);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
! output_asm_insn ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0", operands);
return "";
}
--- 591,598 ----
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 1);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4] = adjust_address (operands[3], word_mode,
! UNITS_PER_WORD);
! output_asm_insn
! ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0", operands);
return "";
}
*************** i960_output_move_double (dst, src)
*** 604,608 ****
{
operands[0] = dst;
! operands[1] = adj_offsettable_operand (dst, UNITS_PER_WORD);
if (! memory_address_p (word_mode, XEXP (operands[1], 0)))
abort ();
--- 606,610 ----
{
operands[0] = dst;
! operands[1] = adjust_address (dst, word_mode, UNITS_PER_WORD);
if (! memory_address_p (word_mode, XEXP (operands[1], 0)))
abort ();
*************** i960_output_move_double_zero (dst)
*** 627,631 ****
operands[0] = dst;
{
! operands[1] = adj_offsettable_operand (dst, 4);
output_asm_insn ("st g14,%0\n\tst g14,%1", operands);
}
--- 629,633 ----
operands[0] = dst;
{
! operands[1] = adjust_address (dst, word_mode, 4);
output_asm_insn ("st g14,%0\n\tst g14,%1", operands);
}
*************** i960_output_move_quad (dst, src)
*** 681,687 ****
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 3);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
! operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD);
! operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD);
output_asm_insn ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0\n\tld %5,%E0\n\tld %6,%F0", operands);
return "";
--- 683,692 ----
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 3);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4]
! = adjust_address (operands[3], word_mode, UNITS_PER_WORD);
! operands[5]
! = adjust_address (operands[4], word_mode, UNITS_PER_WORD);
! operands[6]
! = adjust_address (operands[5], word_mode, UNITS_PER_WORD);
output_asm_insn ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0\n\tld %5,%E0\n\tld %6,%F0", operands);
return "";
*************** i960_output_move_quad (dst, src)
*** 696,702 ****
{
operands[0] = dst;
! operands[1] = adj_offsettable_operand (dst, UNITS_PER_WORD);
! operands[2] = adj_offsettable_operand (dst, 2*UNITS_PER_WORD);
! operands[3] = adj_offsettable_operand (dst, 3*UNITS_PER_WORD);
if (! memory_address_p (word_mode, XEXP (operands[3], 0)))
abort ();
--- 701,707 ----
{
operands[0] = dst;
! operands[1] = adjust_address (dst, word_mode, UNITS_PER_WORD);
! operands[2] = adjust_address (dst, word_mode, 2 * UNITS_PER_WORD);
! operands[3] = adjust_address (dst, word_mode, 3 * UNITS_PER_WORD);
if (! memory_address_p (word_mode, XEXP (operands[3], 0)))
abort ();
*************** i960_output_move_quad_zero (dst)
*** 721,727 ****
operands[0] = dst;
{
! operands[1] = adj_offsettable_operand (dst, 4);
! operands[2] = adj_offsettable_operand (dst, 8);
! operands[3] = adj_offsettable_operand (dst, 12);
output_asm_insn ("st g14,%0\n\tst g14,%1\n\tst g14,%2\n\tst g14,%3", operands);
}
--- 726,732 ----
operands[0] = dst;
{
! operands[1] = adjust_address (dst, word_mode, 4);
! operands[2] = adjust_address (dst, word_mode, 8);
! operands[3] = adjust_address (dst, word_mode, 12);
output_asm_insn ("st g14,%0\n\tst g14,%1\n\tst g14,%2\n\tst g14,%3", operands);
}
*** config/i960/i960.md 2001/04/03 15:05:49 1.19
--- config/i960/i960.md 2001/07/03 14:06:33
***************
*** 910,914 ****
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
return \"lda %0,%2\;st %1,%3\;st %D1,%4\";
}"
--- 910,914 ----
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4] = adjust_address (operands[3], word_mode, UNITS_PER_WORD);
return \"lda %0,%2\;st %1,%3\;st %D1,%4\";
}"
***************
*** 989,995 ****
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
! operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD);
! operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD);
return \"lda %0,%2\;st %1,%3\;st %D1,%4\;st %E1,%5\;st %F1,%6\";
}"
--- 989,995 ----
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
! operands[4] = adjust_address (operands[3], word_mode, UNITS_PER_WORD);
! operands[5] = adjust_address (operands[4], word_mode, UNITS_PER_WORD);
! operands[6] = adjust_address (operands[5], word_mode, UNITS_PER_WORD);
return \"lda %0,%2\;st %1,%3\;st %D1,%4\;st %E1,%5\;st %F1,%6\";
}"
***************
*** 1085,1089 ****
return \"stl %1,%0\";
case 5:
! operands[1] = adj_offsettable_operand (operands[0], 4);
return \"st g14,%0\;st g14,%1\";
}
--- 1085,1089 ----
return \"stl %1,%0\";
case 5:
! operands[1] = adjust_address (operands[0], VOIDmode, 4);
return \"st g14,%0\;st g14,%1\";
}
*** config/m68hc11/m68hc11.c 2001/06/29 17:21:14 1.13
--- config/m68hc11/m68hc11.c 2001/07/03 14:06:41
*************** m68hc11_split_move (to, from, scratch)
*** 2636,2640 ****
if (offset)
{
! high_from = adj_offsettable_operand (high_from, offset);
low_from = high_from;
}
--- 2636,2640 ----
if (offset)
{
! high_from = adjust_address (high_from, mode, offset);
low_from = high_from;
}
*** config/m68k/m68k.c 2001/07/03 01:58:34 1.44
--- config/m68k/m68k.c 2001/07/03 14:06:46
*************** output_scc_di(op, operand1, operand2, de
*** 1067,1071 ****
loperands[1] = gen_rtx_REG (SImode, REGNO (operand1) + 1);
else
! loperands[1] = adj_offsettable_operand (operand1, 4);
if (operand2 != const0_rtx)
{
--- 1067,1071 ----
loperands[1] = gen_rtx_REG (SImode, REGNO (operand1) + 1);
else
! loperands[1] = adjust_address (operand1, SImode, 4);
if (operand2 != const0_rtx)
{
*************** output_scc_di(op, operand1, operand2, de
*** 1074,1078 ****
loperands[3] = gen_rtx_REG (SImode, REGNO (operand2) + 1);
else
! loperands[3] = adj_offsettable_operand (operand2, 4);
}
loperands[4] = gen_label_rtx();
--- 1074,1078 ----
loperands[3] = gen_rtx_REG (SImode, REGNO (operand2) + 1);
else
! loperands[3] = adjust_address (operand2, SImode, 4);
}
loperands[4] = gen_label_rtx();
*************** output_btst (operands, countop, dataop,
*** 1245,1249 ****
int offset = (count & ~signpos) / 8;
count = count & signpos;
! operands[1] = dataop = adj_offsettable_operand (dataop, offset);
}
if (count == signpos)
--- 1245,1249 ----
int offset = (count & ~signpos) / 8;
count = count & signpos;
! operands[1] = dataop = adjust_address (dataop, QImode, offset);
}
if (count == signpos)
*************** output_move_double (operands)
*** 1880,1885 ****
else if (optype0 == OFFSOP)
{
! middlehalf[0] = adj_offsettable_operand (operands[0], 4);
! latehalf[0] = adj_offsettable_operand (operands[0], size - 4);
}
else
--- 1880,1885 ----
else if (optype0 == OFFSOP)
{
! middlehalf[0] = adjust_address (operands[0], SImode, 4);
! latehalf[0] = adjust_address (operands[0], SImode, size - 4);
}
else
*************** output_move_double (operands)
*** 1896,1901 ****
else if (optype1 == OFFSOP)
{
! middlehalf[1] = adj_offsettable_operand (operands[1], 4);
! latehalf[1] = adj_offsettable_operand (operands[1], size - 4);
}
else if (optype1 == CNSTOP)
--- 1896,1901 ----
else if (optype1 == OFFSOP)
{
! middlehalf[1] = adjust_address (operands[1], SImode, 4);
! latehalf[1] = adjust_address (operands[1], SImode, size - 4);
}
else if (optype1 == CNSTOP)
*************** output_move_double (operands)
*** 1935,1939 ****
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adj_offsettable_operand (operands[0], size - 4);
else
latehalf[0] = operands[0];
--- 1935,1939 ----
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adjust_address (operands[0], SImode, size - 4);
else
latehalf[0] = operands[0];
*************** output_move_double (operands)
*** 1942,1946 ****
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adj_offsettable_operand (operands[1], size - 4);
else if (optype1 == CNSTOP)
split_double (operands[1], &operands[1], &latehalf[1]);
--- 1942,1946 ----
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adjust_address (operands[1], SImode, size - 4);
else if (optype1 == CNSTOP)
split_double (operands[1], &operands[1], &latehalf[1]);
*************** compadr:
*** 1977,1990 ****
xops[1] = XEXP (operands[1], 0);
output_asm_insn ("lea %a1,%0", xops);
! if( GET_MODE (operands[1]) == XFmode )
{
operands[1] = gen_rtx_MEM (XFmode, latehalf[0]);
! middlehalf[1] = adj_offsettable_operand (operands[1], size-8);
! latehalf[1] = adj_offsettable_operand (operands[1], size-4);
}
else
{
operands[1] = gen_rtx_MEM (DImode, latehalf[0]);
! latehalf[1] = adj_offsettable_operand (operands[1], size-4);
}
}
--- 1977,1990 ----
xops[1] = XEXP (operands[1], 0);
output_asm_insn ("lea %a1,%0", xops);
! if (GET_MODE (operands[1]) == XFmode )
{
operands[1] = gen_rtx_MEM (XFmode, latehalf[0]);
! middlehalf[1] = adjust_address (operands[1], DImode, size - 8);
! latehalf[1] = adjust_address (operands[1], DImode, size - 4);
}
else
{
operands[1] = gen_rtx_MEM (DImode, latehalf[0]);
! latehalf[1] = adjust_address (operands[1], DImode, size - 4);
}
}
*************** output_andsi3 (operands)
*** 3493,3497 ****
{
if (GET_CODE (operands[0]) != REG)
! operands[0] = adj_offsettable_operand (operands[0], 2);
operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff);
/* Do not delete a following tstl %0 insn; that would be incorrect. */
--- 3493,3497 ----
{
if (GET_CODE (operands[0]) != REG)
! operands[0] = adjust_address (operands[0], HImode, 2);
operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff);
/* Do not delete a following tstl %0 insn; that would be incorrect. */
*************** output_andsi3 (operands)
*** 3512,3516 ****
else
{
! operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8));
operands[1] = GEN_INT (logval % 8);
}
--- 3512,3516 ----
else
{
! operands[0] = adjust_address (operands[0], SImode, 3 - (logval / 8));
operands[1] = GEN_INT (logval % 8);
}
*************** output_iorsi3 (operands)
*** 3534,3538 ****
{
if (GET_CODE (operands[0]) != REG)
! operands[0] = adj_offsettable_operand (operands[0], 2);
/* Do not delete a following tstl %0 insn; that would be incorrect. */
CC_STATUS_INIT;
--- 3534,3538 ----
{
if (GET_CODE (operands[0]) != REG)
! operands[0] = adjust_address (operands[0], HImode, 2);
/* Do not delete a following tstl %0 insn; that would be incorrect. */
CC_STATUS_INIT;
*************** output_iorsi3 (operands)
*** 3547,3556 ****
{
if (DATA_REG_P (operands[0]))
! {
! operands[1] = GEN_INT (logval);
! }
else
{
! operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8));
operands[1] = GEN_INT (logval % 8);
}
--- 3547,3554 ----
{
if (DATA_REG_P (operands[0]))
! operands[1] = GEN_INT (logval);
else
{
! operands[0] = adjust_address (operands[0], SImode, 3 - (logval / 8));
operands[1] = GEN_INT (logval % 8);
}
*************** output_xorsi3 (operands)
*** 3572,3576 ****
{
if (! DATA_REG_P (operands[0]))
! operands[0] = adj_offsettable_operand (operands[0], 2);
/* Do not delete a following tstl %0 insn; that would be incorrect. */
CC_STATUS_INIT;
--- 3570,3574 ----
{
if (! DATA_REG_P (operands[0]))
! operands[0] = adjust_address (operands[0], HImode, 2);
/* Do not delete a following tstl %0 insn; that would be incorrect. */
CC_STATUS_INIT;
*************** output_xorsi3 (operands)
*** 3585,3594 ****
{
if (DATA_REG_P (operands[0]))
! {
! operands[1] = GEN_INT (logval);
! }
else
{
! operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8));
operands[1] = GEN_INT (logval % 8);
}
--- 3583,3590 ----
{
if (DATA_REG_P (operands[0]))
! operands[1] = GEN_INT (logval);
else
{
! operands[0] = adjust_address (operands[0], SImode, 3 - (logval / 8));
operands[1] = GEN_INT (logval % 8);
}
*** config/m68k/m68k.md 2001/07/02 19:47:43 1.40
--- config/m68k/m68k.md 2001/07/03 14:06:58
***************
*** 838,843 ****
if (GET_CODE (operands[0]) == MEM)
{
! operands[0] = adj_offsettable_operand (operands[0],
! INTVAL (operands[1]) / 8);
operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8);
return output_btst (operands, operands[1], operands[0], insn, 7);
--- 838,843 ----
if (GET_CODE (operands[0]) == MEM)
{
! operands[0] = adjust_address (operands[0], QImode,
! INTVAL (operands[1]) / 8);
operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8);
return output_btst (operands, operands[1], operands[0], insn, 7);
***************
*** 859,864 ****
if (GET_CODE (operands[0]) == MEM)
{
! operands[0] = adj_offsettable_operand (operands[0],
! INTVAL (operands[1]) / 8);
operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8);
return output_btst (operands, operands[1], operands[0], insn, 7);
--- 859,864 ----
if (GET_CODE (operands[0]) == MEM)
{
! operands[0] = adjust_address (operands[0], QImode,
! INTVAL (operands[1]) / 8);
operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8);
return output_btst (operands, operands[1], operands[0], insn, 7);
***************
*** 1443,1447 ****
}
if (GET_CODE (operands[1]) == MEM)
! operands[1] = adj_offsettable_operand (operands[1], 3);
return \"move%.b %1,%0\";
}")
--- 1443,1447 ----
}
if (GET_CODE (operands[1]) == MEM)
! operands[1] = adjust_address (operands[1], QImode, 3);
return \"move%.b %1,%0\";
}")
***************
*** 1471,1475 ****
}
if (GET_CODE (operands[1]) == MEM)
! operands[1] = adj_offsettable_operand (operands[1], 1);
return \"move%.b %1,%0\";
}")
--- 1471,1475 ----
}
if (GET_CODE (operands[1]) == MEM)
! operands[1] = adjust_address (operands[1], QImode, 1);
return \"move%.b %1,%0\";
}")
***************
*** 1490,1494 ****
}
if (GET_CODE (operands[1]) == MEM)
! operands[1] = adj_offsettable_operand (operands[1], 2);
return \"move%.w %1,%0\";
}")
--- 1490,1494 ----
}
if (GET_CODE (operands[1]) == MEM)
! operands[1] = adjust_address (operands[1], QImode, 2);
return \"move%.w %1,%0\";
}")
***************
*** 1533,1537 ****
return \"clr%.l %0\;move%.l %1,%0\";
else
! operands[2] = adj_offsettable_operand (operands[0], 4);
if (GET_CODE (operands[1]) != REG || GET_CODE (operands[2]) != REG
|| REGNO (operands[1]) != REGNO (operands[2]))
--- 1533,1537 ----
return \"clr%.l %0\;move%.l %1,%0\";
else
! operands[2] = adjust_address (operands[0], SImode, 4);
if (GET_CODE (operands[1]) != REG || GET_CODE (operands[2]) != REG
|| REGNO (operands[1]) != REGNO (operands[2]))
***************
*** 1620,1624 ****
{
output_asm_insn (\"clr%.w %0\", operands);
! operands[0] = adj_offsettable_operand (operands[0], 2);
return \"move%.w %1,%0\";
}
--- 1620,1624 ----
{
output_asm_insn (\"clr%.w %0\", operands);
! operands[0] = adjust_address (operands[0], HImode, 2);
return \"move%.w %1,%0\";
}
***************
*** 1661,1665 ****
{
output_asm_insn (\"clr%.b %0\", operands);
! operands[0] = adj_offsettable_operand (operands[0], 1);
return \"move%.b %1,%0\";
}
--- 1661,1665 ----
{
output_asm_insn (\"clr%.b %0\", operands);
! operands[0] = adjust_address (operands[0], QImode, 1);
return \"move%.b %1,%0\";
}
***************
*** 1712,1716 ****
{
output_asm_insn (\"clr%.l %0\", operands);
! operands[0] = adj_offsettable_operand (operands[0], 3);
return \"move%.b %1,%0\";
}
--- 1712,1716 ----
{
output_asm_insn (\"clr%.l %0\", operands);
! operands[0] = adjust_address (operands[0], QImode, 3);
return \"move%.b %1,%0\";
}
***************
*** 2110,2114 ****
operands[4] = operands[1];
else
! operands[4] = adj_offsettable_operand (operands[1], 4);
if (GET_CODE (operands[1]) == MEM
&& GET_CODE (XEXP (operands[1], 0)) == PRE_DEC)
--- 2110,2114 ----
operands[4] = operands[1];
else
! operands[4] = adjust_address (operands[1], SImode, 4);
if (GET_CODE (operands[1]) == MEM
&& GET_CODE (XEXP (operands[1], 0)) == PRE_DEC)
***************
*** 2159,2163 ****
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[2] = adj_offsettable_operand (operands[0], 4);
return \"add%.l %1,%2\;negx%.l %0\;neg%.l %0\";
} ")
--- 2159,2163 ----
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[2] = adjust_address (operands[0], SImode, 4);
return \"add%.l %1,%2\;negx%.l %0\;neg%.l %0\";
} ")
***************
*** 2178,2182 ****
operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[1] = adj_offsettable_operand (operands[1], 4);
return \"add%.l %1,%0\";
} ")
--- 2178,2182 ----
operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[1] = adjust_address (operands[1], SImode, 4);
return \"add%.l %1,%0\";
} ")
***************
*** 2211,2215 ****
else
{
! low = adj_offsettable_operand (operands[2], 4);
high = operands[2];
}
--- 2211,2215 ----
else
{
! low = adjust_address (operands[2], SImode, 4);
high = operands[2];
}
***************
*** 2266,2270 ****
else
{
! operands[1] = adj_offsettable_operand (operands[0], 4);
return \"add%.l %R2,%1\;move%.l %0,%3\;addx%.l %2,%3\;move%.l %3,%0\";
}
--- 2266,2270 ----
else
{
! operands[1] = adjust_address (operands[0], SImode, 4);
return \"add%.l %R2,%1\;move%.l %0,%3\;addx%.l %2,%3\;move%.l %3,%0\";
}
***************
*** 2738,2742 ****
operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[1] = adj_offsettable_operand (operands[1], 4);
return \"sub%.l %1,%0\";
} ")
--- 2738,2742 ----
operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[1] = adjust_address (operands[1], SImode, 4);
return \"sub%.l %1,%0\";
} ")
***************
*** 2773,2777 ****
else
{
! low = adj_offsettable_operand (operands[2], 4);
high = operands[2];
}
--- 2773,2777 ----
else
{
! low = adjust_address (operands[2], SImode, 4);
high = operands[2];
}
***************
*** 2828,2832 ****
else
{
! operands[1] = adj_offsettable_operand (operands[0], 4);
return \"sub%.l %R2,%1\;move%.l %0,%3\;subx%.l %2,%3\;move%.l %3,%0\";
}
--- 2828,2832 ----
else
{
! operands[1] = adjust_address (operands[0], SImode, 4);
return \"sub%.l %R2,%1\;move%.l %0,%3\;subx%.l %2,%3\;move%.l %3,%0\";
}
***************
*** 3665,3669 ****
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 4);
switch (INTVAL (lo))
{
--- 3665,3669 ----
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], SImode, 4);
switch (INTVAL (lo))
{
***************
*** 3686,3695 ****
if (GET_CODE (operands[0]) != REG)
{
! operands[1] = adj_offsettable_operand (operands[0], 4);
return \"and%.l %2,%0\;and%.l %R2,%1\";
}
if (GET_CODE (operands[2]) != REG)
{
! operands[1] = adj_offsettable_operand (operands[2], 4);
return \"and%.l %2,%0\;and%.l %1,%R0\";
}
--- 3686,3695 ----
if (GET_CODE (operands[0]) != REG)
{
! operands[1] = adjust_address (operands[0], SImode, 4);
return \"and%.l %2,%0\;and%.l %R2,%1\";
}
if (GET_CODE (operands[2]) != REG)
{
! operands[1] = adjust_address (operands[2], SImode, 4);
return \"and%.l %2,%0\;and%.l %1,%R0\";
}
***************
*** 3782,3791 ****
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 4);
if (GET_MODE (operands[1]) == SImode)
return \"or%.l %1,%0\";
byte_mode = (GET_MODE (operands[1]) == QImode);
if (GET_CODE (operands[0]) == MEM)
! operands[0] = adj_offsettable_operand (operands[0], byte_mode ? 3 : 2);
if (byte_mode)
return \"or%.b %1,%0\";
--- 3782,3792 ----
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], SImode, 4);
if (GET_MODE (operands[1]) == SImode)
return \"or%.l %1,%0\";
byte_mode = (GET_MODE (operands[1]) == QImode);
if (GET_CODE (operands[0]) == MEM)
! operands[0] = adjust_address (operands[0], byte_mode ? QImode : HImode,
! byte_mode ? 3 : 2);
if (byte_mode)
return \"or%.b %1,%0\";
***************
*** 3831,3835 ****
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 4);
switch (INTVAL (lo))
{
--- 3832,3836 ----
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], SImode, 4);
switch (INTVAL (lo))
{
***************
*** 3854,3863 ****
if (GET_CODE (operands[0]) != REG)
{
! operands[1] = adj_offsettable_operand (operands[0], 4);
return \"or%.l %2,%0\;or%.l %R2,%1\";
}
if (GET_CODE (operands[2]) != REG)
{
! operands[1] = adj_offsettable_operand (operands[2], 4);
return \"or%.l %2,%0\;or%.l %1,%R0\";
}
--- 3855,3864 ----
if (GET_CODE (operands[0]) != REG)
{
! operands[1] = adjust_address (operands[0], SImode, 4);
return \"or%.l %2,%0\;or%.l %R2,%1\";
}
if (GET_CODE (operands[2]) != REG)
{
! operands[1] = adjust_address (operands[2], SImode, 4);
return \"or%.l %2,%0\;or%.l %1,%R0\";
}
***************
*** 3944,3948 ****
CC_STATUS_INIT;
if (GET_CODE (operands[2]) != REG)
! operands[2] = adj_offsettable_operand (operands[2], 2);
if (GET_CODE (operands[2]) != REG
|| REGNO (operands[2]) != REGNO (operands[0]))
--- 3945,3949 ----
CC_STATUS_INIT;
if (GET_CODE (operands[2]) != REG)
! operands[2] = adjust_address (operands[2], HImode, 2);
if (GET_CODE (operands[2]) != REG
|| REGNO (operands[2]) != REGNO (operands[0]))
***************
*** 3963,3967 ****
byte_mode = (GET_MODE (operands[1]) == QImode);
if (GET_CODE (operands[0]) == MEM)
! operands[0] = adj_offsettable_operand (operands[0], byte_mode ? 3 : 2);
if (byte_mode)
return \"or%.b %1,%0\";
--- 3964,3969 ----
byte_mode = (GET_MODE (operands[1]) == QImode);
if (GET_CODE (operands[0]) == MEM)
! operands[0] = adjust_address (operands[0], byte_mode ? QImode : HImode,
! byte_mode ? 3 : 2);
if (byte_mode)
return \"or%.b %1,%0\";
***************
*** 4010,4014 ****
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 4);
switch (INTVAL (lo))
{
--- 4012,4016 ----
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], SImode, 4);
switch (INTVAL (lo))
{
***************
*** 4035,4044 ****
if (GET_CODE (operands[0]) != REG)
{
! operands[1] = adj_offsettable_operand (operands[0], 4);
return \"eor%.l %2,%0\;eor%.l %R2,%1\";
}
if (GET_CODE (operands[2]) != REG)
{
! operands[1] = adj_offsettable_operand (operands[2], 4);
return \"eor%.l %2,%0\;eor%.l %1,%R0\";
}
--- 4037,4046 ----
if (GET_CODE (operands[0]) != REG)
{
! operands[1] = adjust_address (operands[0], SImode, 4);
return \"eor%.l %2,%0\;eor%.l %R2,%1\";
}
if (GET_CODE (operands[2]) != REG)
{
! operands[1] = adjust_address (operands[2], SImode, 4);
return \"eor%.l %2,%0\;eor%.l %1,%R0\";
}
***************
*** 4139,4143 ****
operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[1] = adj_offsettable_operand (operands[0], 4);
if (ADDRESS_REG_P (operands[0]))
return \"exg %/d0,%1\;neg%.l %/d0\;exg %/d0,%1\;exg %/d0,%0\;negx%.l %/d0\;exg %/d0,%0\";
--- 4141,4145 ----
operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[1] = adjust_address (operands[0], SImode, 4);
if (ADDRESS_REG_P (operands[0]))
return \"exg %/d0,%1\;neg%.l %/d0\;exg %/d0,%1\;exg %/d0,%0\;negx%.l %/d0\;exg %/d0,%0\";
***************
*** 4452,4456 ****
operands[1] = operands[0];
else
! operands[1] = adj_offsettable_operand (operands[0], 4);
return \"not%.l %1\;not%.l %0\";
}")
--- 4454,4458 ----
operands[1] = operands[0];
else
! operands[1] = adjust_address (operands[0], SImode, 4);
return \"not%.l %1\;not%.l %0\";
}")
***************
*** 4521,4525 ****
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[2] = adj_offsettable_operand (operands[0], 4);
if (ADDRESS_REG_P (operands[0]))
return \"move%.l %1,%0\;sub%.l %2,%2\";
--- 4523,4527 ----
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[2] = adjust_address (operands[0], SImode, 4);
if (ADDRESS_REG_P (operands[0]))
return \"move%.l %1,%0\;sub%.l %2,%2\";
***************
*** 4545,4549 ****
else
{
! operands[3] = adj_offsettable_operand (operands[0], 4);
return \"move%.w %1,%2\;move%.l %2,%0\;clr%.l %3\";
}
--- 4547,4551 ----
else
{
! operands[3] = adjust_address (operands[0], SImode, 4);
return \"move%.w %1,%2\;move%.l %2,%0\;clr%.l %3\";
}
***************
*** 4566,4570 ****
operands[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[3] = adj_offsettable_operand (operands[1], 4);
if (GET_CODE (operands[0]) == REG)
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
--- 4568,4572 ----
operands[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[3] = adjust_address (operands[1], SImode, 4);
if (GET_CODE (operands[0]) == REG)
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
***************
*** 4574,4578 ****
return \"move%.l %3,%0\;clr%.l %0\";
else
! operands[2] = adj_offsettable_operand (operands[0], 4);
if (ADDRESS_REG_P (operands[2]))
return \"move%.l %3,%0\;sub%.l %2,%2\";
--- 4576,4580 ----
return \"move%.l %3,%0\;clr%.l %0\";
else
! operands[2] = adjust_address (operands[0], SImode, 4);
if (ADDRESS_REG_P (operands[2]))
return \"move%.l %3,%0\;sub%.l %2,%2\";
***************
*** 4736,4740 ****
{
if (GET_CODE (operands[1]) != REG)
! operands[1] = adj_offsettable_operand (operands[1], 2);
return \"move%.w %1,%0\";
} ")
--- 4738,4742 ----
{
if (GET_CODE (operands[1]) != REG)
! operands[1] = adjust_address (operands[1], HImode, 2);
return \"move%.w %1,%0\";
} ")
***************
*** 4777,4781 ****
operands[3] = operands[0];
else
! operands[3] = adj_offsettable_operand (operands[0], 4);
if (TARGET_68020)
return \"move%.l %1,%3\;smi %2\;extb%.l %2\;move%.l %2,%0\";
--- 4779,4783 ----
operands[3] = operands[0];
else
! operands[3] = adjust_address (operands[0], SImode, 4);
if (TARGET_68020)
return \"move%.l %1,%3\;smi %2\;extb%.l %2\;move%.l %2,%0\";
***************
*** 4917,4921 ****
;; operands[2] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
;; else
! ;; operands[2] = adj_offsettable_operand (operands[1], 4);
;; return \"move%.l %0,%2\;clr%.l %1\";
;;} ")
--- 4919,4923 ----
;; operands[2] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
;; else
! ;; operands[2] = adjust_address (operands[1], SImode, 4);
;; return \"move%.l %0,%2\;clr%.l %1\";
;;} ")
***************
*** 4946,4954 ****
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[2] = adj_offsettable_operand (operands[0], 4);
if (GET_CODE (operands[1]) == REG)
operands[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[3] = adj_offsettable_operand (operands[1], 4);
if (ADDRESS_REG_P (operands[0]))
return \"move%.l %1,%2\;sub%.l %0,%0\";
--- 4948,4956 ----
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[2] = adjust_address (operands[0], SImode, 4);
if (GET_CODE (operands[1]) == REG)
operands[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else
! operands[3] = adjust_address (operands[1], SImode, 4);
if (ADDRESS_REG_P (operands[0]))
return \"move%.l %1,%2\;sub%.l %0,%0\";
***************
*** 5285,5289 ****
{
operands[0]
! = adj_offsettable_operand (operands[0], INTVAL (operands[1]) / 8);
return \"move%.l %2,%0\";
--- 5287,5291 ----
{
operands[0]
! = adjust_address (operands[0], SImode, INTVAL (operands[1]) / 8);
return \"move%.l %2,%0\";
***************
*** 5308,5317 ****
}
else
! operands[0]
! = adj_offsettable_operand (operands[0], INTVAL (operands[2]) / 8);
if (GET_CODE (operands[3]) == MEM)
! operands[3] = adj_offsettable_operand (operands[3],
! (32 - INTVAL (operands[1])) / 8);
if (INTVAL (operands[1]) == 8)
return \"move%.b %3,%0\";
--- 5310,5322 ----
}
else
! operands[0] = adjust_address (operands[0],
! INTVAL (operands[1]) == 8 ? QImode : HImode,
! INTVAL (operands[2]) / 8);
if (GET_CODE (operands[3]) == MEM)
! operands[3] = adjust_address (operands[3],
! INTVAL (operands[1]) == 8 ? QImode : HImode,
! (32 - INTVAL (operands[1])) / 8);
!
if (INTVAL (operands[1]) == 8)
return \"move%.b %3,%0\";
***************
*** 5338,5342 ****
{
operands[1]
! = adj_offsettable_operand (operands[1], INTVAL (operands[2]) / 8);
return \"move%.l %1,%0\";
--- 5343,5347 ----
{
operands[1]
! = adjust_address (operands[1], SImode, INTVAL (operands[2]) / 8);
return \"move%.l %1,%0\";
***************
*** 5363,5372 ****
else
operands[1]
! = adj_offsettable_operand (operands[1], INTVAL (operands[3]) / 8);
output_asm_insn (\"clr%.l %0\", operands);
if (GET_CODE (operands[0]) == MEM)
! operands[0] = adj_offsettable_operand (operands[0],
! (32 - INTVAL (operands[1])) / 8);
if (INTVAL (operands[2]) == 8)
return \"move%.b %1,%0\";
--- 5368,5379 ----
else
operands[1]
! = adjust_address (operands[1], SImode, INTVAL (operands[3]) / 8);
output_asm_insn (\"clr%.l %0\", operands);
if (GET_CODE (operands[0]) == MEM)
! operands[0] = adjust_address (operands[0],
! INTVAL (operands[2]) == 8 ? QImode : HImode,
! (32 - INTVAL (operands[1])) / 8);
!
if (INTVAL (operands[2]) == 8)
return \"move%.b %1,%0\";
***************
*** 5392,5396 ****
{
operands[1]
! = adj_offsettable_operand (operands[1], INTVAL (operands[2]) / 8);
return \"move%.l %1,%0\";
--- 5399,5403 ----
{
operands[1]
! = adjust_address (operands[1], SImode, INTVAL (operands[2]) / 8);
return \"move%.l %1,%0\";
***************
*** 5416,5420 ****
else
operands[1]
! = adj_offsettable_operand (operands[1], INTVAL (operands[3]) / 8);
if (INTVAL (operands[2]) == 8)
--- 5423,5429 ----
else
operands[1]
! = adjust_address (operands[1],
! INTVAL (operands[2]) == 8 ? QImode : HImode,
! INTVAL (operands[3]) / 8);
if (INTVAL (operands[2]) == 8)
***************
*** 5919,5923 ****
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[3] = adj_offsettable_operand (operands[0], 4);
if (! ADDRESS_REG_P (operands[0]))
{
--- 5928,5932 ----
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[3] = adjust_address (operands[0], SImode, 4);
if (! ADDRESS_REG_P (operands[0]))
{
***************
*** 5999,6003 ****
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[3] = adj_offsettable_operand (operands[0], 4);
if (!ADDRESS_REG_P (operands[0]))
{
--- 6008,6012 ----
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
! operands[3] = adjust_address (operands[0], SImode, 4);
if (!ADDRESS_REG_P (operands[0]))
{
*** config/m88k/m88k.md 2001/04/03 15:05:58 1.12
--- config/m88k/m88k.md 2001/07/03 14:07:04
***************
*** 2014,2018 ****
; return \"or %0,%#r0,0\;or %d0,%#r0,0\";
; case 1:
! ; operands[1] = adj_offsettable_operand (operands[0], 4);
; return \"%v0st\\t %#r0,%0\;st %#r0,%1\";
; }
--- 2014,2018 ----
; return \"or %0,%#r0,0\;or %d0,%#r0,0\";
; case 1:
! ; operands[1] = adjust_address (operands[0], SImode, 4);
; return \"%v0st\\t %#r0,%0\;st %#r0,%1\";
; }
*** config/mcore/mcore.c 2001/06/26 18:09:02 1.13
--- mcore.c 2001/07/03 14:07:08
*************** mcore_print_operand (stream, x, code)
*** 310,315 ****
break;
case MEM:
! mcore_print_operand_address (stream,
! XEXP (adj_offsettable_operand (x, 4), 0));
break;
default:
--- 310,315 ----
break;
case MEM:
! mcore_print_operand_address
! (stream, XEXP (adjust_address (x, SImode, 4), 0));
break;
default:
*** config/mips/mips.c 2001/07/03 01:58:35 1.119
--- config/mips/mips.c 2001/07/03 14:07:21
*************** mips_move_2words (operands, insn)
*** 2539,2543 ****
else if (double_memory_operand (op1, GET_MODE (op1)))
{
! operands[2] = adj_offsettable_operand (op1, 4);
ret = (reg_mentioned_p (op0, op1)
? "lw\t%D0,%2\n\tlw\t%0,%1"
--- 2539,2543 ----
else if (double_memory_operand (op1, GET_MODE (op1)))
{
! operands[2] = adjust_address (op1, SImode, 4);
ret = (reg_mentioned_p (op0, op1)
? "lw\t%D0,%2\n\tlw\t%0,%1"
*************** mips_move_2words (operands, insn)
*** 2633,2637 ****
else if (double_memory_operand (op0, GET_MODE (op0)))
{
! operands[2] = adj_offsettable_operand (op0, 4);
ret = "sw\t%1,%0\n\tsw\t%D1,%2";
}
--- 2633,2637 ----
else if (double_memory_operand (op0, GET_MODE (op0)))
{
! operands[2] = adjust_address (op0, SImode, 4);
ret = "sw\t%1,%0\n\tsw\t%D1,%2";
}
*************** mips_move_2words (operands, insn)
*** 2648,2652 ****
else
{
! operands[2] = adj_offsettable_operand (op0, 4);
ret = "sw\t%.,%0\n\tsw\t%.,%2";
}
--- 2648,2652 ----
else
{
! operands[2] = adjust_address (op0, SImode, 4);
ret = "sw\t%.,%0\n\tsw\t%.,%2";
}
*** config/mips/mips.md 2001/07/02 19:47:43 1.96
--- config/mips/mips.md 2001/07/03 14:07:38
*************** move\\t%0,%z4\\n\\
*** 5071,5076 ****
scratch = gen_rtx_REG (SImode, REGNO (scratch));
memword = adjust_address (op1, SImode, 0);
! offword = change_address (adj_offsettable_operand (op1, 4),
! SImode, NULL_RTX);
if (BYTES_BIG_ENDIAN)
{
--- 5071,5076 ----
scratch = gen_rtx_REG (SImode, REGNO (scratch));
memword = adjust_address (op1, SImode, 0);
! offword = adjust_address (op1, SImode, 4);
!
if (BYTES_BIG_ENDIAN)
{
*************** move\\t%0,%z4\\n\\
*** 5151,5156 ****
scratch = gen_rtx_REG (SImode, REGNO (operands[2]));
memword = adjust_address (op0, SImode, 0);
! offword = change_address (adj_offsettable_operand (op0, 4),
! SImode, NULL_RTX);
if (BYTES_BIG_ENDIAN)
{
--- 5151,5156 ----
scratch = gen_rtx_REG (SImode, REGNO (operands[2]));
memword = adjust_address (op0, SImode, 0);
! offword = adjust_address (op0, SImode, 4);
!
if (BYTES_BIG_ENDIAN)
{
*** config/mn10200/mn10200.c 2001/06/26 18:09:04 1.18
--- config/mn10200/mn10200.c 2001/07/03 14:07:40
*************** print_operand (file, x, code)
*** 218,222 ****
case MEM:
fputc ('(', file);
! x = adj_offsettable_operand (x, 2);
output_address (XEXP (x, 0));
fputc (')', file);
--- 218,222 ----
case MEM:
fputc ('(', file);
! x = adjust_address (x, HImode, 2);
output_address (XEXP (x, 0));
fputc (')', file);
*** config/mn10300/mn10300.c 2001/06/26 18:09:07 1.36
--- config/mn10300/mn10300.c 2001/07/03 14:07:42
*************** print_operand (file, x, code)
*** 201,205 ****
case MEM:
fputc ('(', file);
! x = adj_offsettable_operand (x, 4);
output_address (XEXP (x, 0));
fputc (')', file);
--- 201,205 ----
case MEM:
fputc ('(', file);
! x = adjust_address (x, SImode, 4);
output_address (XEXP (x, 0));
fputc (')', file);
*** config/ns32k/ns32k.c 2001/07/02 19:47:43 1.15
--- config/ns32k/ns32k.c 2001/07/03 14:07:43
*************** split_di (operands, num, lo_half, hi_hal
*** 256,260 ****
{
lo_half[num] = operands[num];
! hi_half[num] = adj_offsettable_operand (operands[num], 4);
}
else
--- 256,260 ----
{
lo_half[num] = operands[num];
! hi_half[num] = adjust_address (operands[num], SImode, 4);
}
else
*************** output_move_double (operands)
*** 326,330 ****
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
--- 326,330 ----
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adjust_address (operands[0], SImode, 4);
else
latehalf[0] = operands[0];
*************** output_move_double (operands)
*** 333,337 ****
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
split_double (operands[1], &operands[1], &latehalf[1]);
--- 333,337 ----
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adjust_address (operands[1], SImode, 4);
else if (optype1 == CNSTOP)
split_double (operands[1], &operands[1], &latehalf[1]);
*************** output_move_double (operands)
*** 383,387 ****
output_asm_insn ("addr %a0,%1", xops);
operands[1] = gen_rtx_MEM (DImode, operands[0]);
! latehalf[1] = adj_offsettable_operand (operands[1], 4);
/* The first half has the overlap, Do the late half first. */
output_asm_insn (singlemove_string (latehalf), latehalf);
--- 383,387 ----
output_asm_insn ("addr %a0,%1", xops);
operands[1] = gen_rtx_MEM (DImode, operands[0]);
! latehalf[1] = adjust_address (operands[1], SImode, 4);
/* The first half has the overlap, Do the late half first. */
output_asm_insn (singlemove_string (latehalf), latehalf);
*** config/ns32k/ns32k.md 2001/06/30 18:07:44 1.18
--- config/ns32k/ns32k.md 2001/07/03 14:07:48
***************
*** 2218,2223 ****
if (INTVAL (operands[2]) >= 8)
{
! operands[0] = adj_offsettable_operand (operands[0],
! INTVAL (operands[2]) / 8);
operands[2] = GEN_INT (INTVAL (operands[2]) % 8);
}
--- 2218,2223 ----
if (INTVAL (operands[2]) >= 8)
{
! operands[0] = adjust_address (operands[0], QImode,
! INTVAL (operands[2]) / 8);
operands[2] = GEN_INT (INTVAL (operands[2]) % 8);
}
*** config/pa/pa.c 2001/07/03 01:58:35 1.114
--- config/pa/pa.c 2001/07/03 14:07:58
*************** output_move_double (operands)
*** 2062,2066 ****
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
--- 2062,2066 ----
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adjust_address (operands[0], SImode, 4);
else
latehalf[0] = operands[0];
*************** output_move_double (operands)
*** 2069,2073 ****
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
split_double (operands[1], &operands[1], &latehalf[1]);
--- 2069,2073 ----
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adjust_address (operands[1], SImode, 4);
else if (optype1 == CNSTOP)
split_double (operands[1], &operands[1], &latehalf[1]);
*** config/pdp11/pdp11.c 2001/06/26 18:09:11 1.17
--- config/pdp11/pdp11.c 2001/07/03 14:08:00
*************** output_move_double (operands)
*** 405,409 ****
latehalf[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adj_offsettable_operand (operands[0], 2);
else
latehalf[0] = operands[0];
--- 405,409 ----
latehalf[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
! latehalf[0] = adjust_address (operands[0], HImode, 2);
else
latehalf[0] = operands[0];
*************** output_move_double (operands)
*** 412,416 ****
latehalf[1] = gen_rtx_REG (HImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adj_offsettable_operand (operands[1], 2);
else if (optype1 == CNSTOP)
{
--- 412,416 ----
latehalf[1] = gen_rtx_REG (HImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
! latehalf[1] = adjust_address (operands[1], HImode, 2);
else if (optype1 == CNSTOP)
{
*************** output_move_quad (operands)
*** 617,621 ****
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2);
else if (optype0 == OFFSOP)
! latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
--- 617,621 ----
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2);
else if (optype0 == OFFSOP)
! latehalf[0] = adjust_address (operands[0], SImode, 4);
else
latehalf[0] = operands[0];
*************** output_move_quad (operands)
*** 624,628 ****
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2);
else if (optype1 == OFFSOP)
! latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
{
--- 624,628 ----
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2);
else if (optype1 == OFFSOP)
! latehalf[1] = adjust_address (operands[1], SImode, 4);
else if (optype1 == CNSTOP)
{
*** config/pdp11/pdp11.md 2001/04/03 15:06:09 1.14
--- config/pdp11/pdp11.md 2001/07/03 14:08:01
***************
*** 835,844 ****
/* we don't want to mess with auto increment */
! switch(which_alternative)
{
case 0:
latehalf[0] = operands[0];
! operands[0] = adj_offsettable_operand(operands[0], 2);
output_asm_insn(\"mov %1, %0\", operands);
--- 835,844 ----
/* we don't want to mess with auto increment */
! switch (which_alternative)
{
case 0:
latehalf[0] = operands[0];
! operands[0] = adjust_address(operands[0], HImode, 2);
output_asm_insn(\"mov %1, %0\", operands);
***************
*** 1001,1005 ****
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 2);
if (! CONSTANT_P(operands[2]))
--- 1001,1005 ----
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], HImode, 2);
if (! CONSTANT_P(operands[2]))
***************
*** 1010,1014 ****
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adj_offsettable_operand(operands[2], 2);
output_asm_insn (\"add %2, %0\", operands);
--- 1010,1014 ----
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adjust_address (operands[2], HImode, 2);
output_asm_insn (\"add %2, %0\", operands);
***************
*** 1103,1107 ****
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 2);
lateoperands[2] = operands[2];
--- 1103,1107 ----
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], HImode, 2);
lateoperands[2] = operands[2];
***************
*** 1110,1114 ****
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adj_offsettable_operand(operands[2], 2);
output_asm_insn (\"sub %2, %0\", operands);
--- 1110,1114 ----
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adjust_address (operands[2], HImode, 2);
output_asm_insn (\"sub %2, %0\", operands);
***************
*** 1210,1214 ****
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 2);
if (! CONSTANT_P(operands[2]))
--- 1210,1214 ----
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], HImode, 2);
if (! CONSTANT_P(operands[2]))
***************
*** 1219,1223 ****
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adj_offsettable_operand(operands[2], 2);
output_asm_insn (\"bic %2, %0\", operands);
--- 1219,1223 ----
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adjust_address (operands[2], HImode, 2);
output_asm_insn (\"bic %2, %0\", operands);
***************
*** 1275,1279 ****
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adj_offsettable_operand (operands[0], 2);
if (! CONSTANT_P(operands[2]))
--- 1275,1279 ----
operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1);
else
! operands[0] = adjust_address (operands[0], HImode, 2);
if (! CONSTANT_P(operands[2]))
***************
*** 1284,1288 ****
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adj_offsettable_operand (operands[2], 2);
output_asm_insn (\"bis %2, %0\", operands);
--- 1284,1288 ----
operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1);
else
! operands[2] = adjust_address (operands[2], HImode, 2);
output_asm_insn (\"bis %2, %0\", operands);
*** config/sh/sh.c 2001/07/02 19:47:44 1.103
--- config/sh/sh.c 2001/07/03 14:08:09
*************** print_operand (stream, x, code)
*** 295,299 ****
if (GET_CODE (XEXP (x, 0)) != PRE_DEC
&& GET_CODE (XEXP (x, 0)) != POST_INC)
! x = adj_offsettable_operand (x, 4);
print_operand_address (stream, XEXP (x, 0));
break;
--- 295,299 ----
if (GET_CODE (XEXP (x, 0)) != PRE_DEC
&& GET_CODE (XEXP (x, 0)) != POST_INC)
! x = adjust_address (x, SImode, 4);
print_operand_address (stream, XEXP (x, 0));
break;
*** config/v850/v850.c 2001/06/26 18:09:20 1.42
--- config/v850/v850.c 2001/07/03 14:08:12
*************** print_operand (file, x, code)
*** 483,487 ****
break;
case MEM:
! x = XEXP (adj_offsettable_operand (x, 4), 0);
print_operand_address (file, x);
if (GET_CODE (x) == CONST_INT)
--- 483,487 ----
break;
case MEM:
! x = XEXP (adjust_address (x, SImode, 4), 0);
print_operand_address (file, x);
if (GET_CODE (x) == CONST_INT)
*** config/vax/vax.md 2001/01/14 09:08:51 1.15
--- config/vax/vax.md 2001/07/03 14:08:14
***************
*** 1323,1327 ****
else
operands[0]
! = adj_offsettable_operand (operands[0], INTVAL (operands[2]) / 8);
CC_STATUS_INIT;
--- 1323,1329 ----
else
operands[0]
! = adjust_address (operands[0],
! INTVAL (operands[1]) == 8 ? QImode : HImode,
! INTVAL (operands[2]) / 8);
CC_STATUS_INIT;
***************
*** 1349,1353 ****
else
operands[1]
! = adj_offsettable_operand (operands[1], INTVAL (operands[3]) / 8);
if (INTVAL (operands[2]) == 8)
--- 1351,1357 ----
else
operands[1]
! = adjust_address (operands[1],
! INTVAL (operands[2]) == 8 ? QImode : HImode,
! INTVAL (operands[3]) / 8);
if (INTVAL (operands[2]) == 8)
***************
*** 1374,1378 ****
else
operands[1]
! = adj_offsettable_operand (operands[1], INTVAL (operands[3]) / 8);
if (INTVAL (operands[2]) == 8)
--- 1378,1384 ----
else
operands[1]
! = adjust_address (operands[1],
! INTVAL (operands[2]) == 8 ? QImode : HImode,
! INTVAL (operands[3]) / 8);
if (INTVAL (operands[2]) == 8)
*** config/we32k/we32k.c 2001/06/26 18:09:23 1.10
--- config/we32k/we32k.c 2001/07/03 14:08:15
*************** output_move_double (operands)
*** 52,56 ****
}
else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
else
abort ();
--- 52,56 ----
}
else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adjust_address (operands[0], SImode, 4);
else
abort ();
*************** output_move_double (operands)
*** 63,67 ****
else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
{
! lsw_operands[1] = adj_offsettable_operand (operands[1], 4);
lsw_sreg = operands[1];
for ( ; ; )
--- 63,67 ----
else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
{
! lsw_operands[1] = adjust_address (operands[1], SImode, 4);
lsw_sreg = operands[1];
for ( ; ; )
*************** output_push_double (operands)
*** 129,133 ****
lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
else if (GET_CODE (operands[0]) == CONST_DOUBLE)
{
--- 129,133 ----
lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adjust_address (operands[0], SImode, 4);
else if (GET_CODE (operands[0]) == CONST_DOUBLE)
{
*** config/we32k/we32k.md 2000/05/01 17:32:22 1.5
--- config/we32k/we32k.md 2001/07/03 14:08:16
***************
*** 129,133 ****
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adj_offsettable_operand(operands[0], 4);
else
abort();
--- 130,134 ----
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adjust_address (operands[0], SImode, 4);
else
abort();
***************
*** 137,141 ****
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adj_offsettable_operand(operands[2], 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
--- 138,142 ----
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adjust_address (operands[2], SImode, 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
***************
*** 179,183 ****
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adj_offsettable_operand(operands[0], 4);
else
abort();
--- 180,184 ----
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adjust_address(operands[0], SImode, 4);
else
abort();
***************
*** 187,191 ****
else
if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
! lsw_operands[1] = adj_offsettable_operand(operands[1], 4);
else
if (GET_CODE (operands[1]) == CONST_DOUBLE)
--- 188,192 ----
else
if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
! lsw_operands[1] = adjust_address (operands[1], SImode, 4);
else
if (GET_CODE (operands[1]) == CONST_DOUBLE)
***************
*** 207,211 ****
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adj_offsettable_operand(operands[2], 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
--- 208,212 ----
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adjust_address (operands[2], SImode, 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
***************
*** 293,297 ****
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adj_offsettable_operand(operands[0], 4);
else
abort();
--- 294,298 ----
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adjust_address (operands[0], SImode, 4);
else
abort();
***************
*** 301,305 ****
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adj_offsettable_operand(operands[2], 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
--- 302,306 ----
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adjust_address (operands[2], SImode, 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
***************
*** 343,347 ****
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adj_offsettable_operand(operands[0], 4);
else
abort();
--- 344,348 ----
else
if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
! lsw_operands[0] = adjust_address (operands[0], SImode, 4);
else
abort();
***************
*** 351,355 ****
else
if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
! lsw_operands[1] = adj_offsettable_operand(operands[1], 4);
else
if (GET_CODE (operands[1]) == CONST_DOUBLE)
--- 352,356 ----
else
if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
! lsw_operands[1] = adjust_address (operands[1], SImode, 4);
else
if (GET_CODE (operands[1]) == CONST_DOUBLE)
***************
*** 371,375 ****
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adj_offsettable_operand(operands[2], 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)
--- 372,376 ----
else
if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2]))
! lsw_operands[2] = adjust_address (operands[2], SImode, 4);
else
if (GET_CODE (operands[2]) == CONST_DOUBLE)