Re: PATCH: extra machine-dependent passes

[DJ Delorie <dj at redhat dot com>]

> I could imagine a more MI pass that takes a HARD_REG_SET, which has 1 bits for
> the special registers, and a macro return a new register for the first usage of
> the special register (other instances of the same register would then use this
> value).

If there were some way for a pseudo-reg to be "assigned" the value of
a hard reg from the beginning of the function (this is trivial to do
now if you don't inline, but the inline case is troublesome) it could
easily be MI.

If there were some function that, given a hard regno, returned a
pseudo to refer to that hard reg's value at the beginning of the
function (for inlines, the parent function), and if register
allocation know which pseudos were these kinds, in theory regalloc and
reload could get together to arrange for the right value to be in
them.  Or more simply, if gcc kept track of these pseudos on a
per-function bases (perhaps in cfun) and let integrate stitch them
together like it does for argument registers, that would take care of
it also.  Say,

      struct cfun { ...
	rtx initial_value_pseudos [FIRST_PSEUDO_REGISTER];

> > The pre-alloc hook is intended to, at some point, try to force a
> > preference for these pseudos to simply remain in their hard regs,
> > since the chip is designed to work best that way.  GCC does OK without
> > it, but not as good as I'd like in some cases.
> 
> I probably don't have enough information about what you want to do.

To implement my solution currently, I emit a SET at the beginning of
the function that copies the hard reg into the selected pseudo.
Ideally, gcc would assign that hard reg to that pseudo and remove the
SET completely.  It doesn't always do that.  I would like it to try
harder to assign that hard reg to that pseudo.