Re: [PATCH] Handle weak symbols

[Franz Sirl <Franz dot Sirl-kernel at lauterbach dot com>]

On Thursday 10 May 2001 01:07, Richard Henderson wrote:
> On Thu, May 10, 2001 at 12:42:43AM +0200, Franz Sirl wrote:
> >   /* A and B may not be modified in the range [cond_earliest, jump).  */
> >   for (insn = if_info.cond_earliest; insn != jump; insn = NEXT_INSN
> > (insn)) if (INSN_P (insn)
> >         && (modified_in_p (a, insn) || modified_in_p (b, insn)))
> >       return FALSE;
> >
> > The use of modified_in_p rejects any MEMs.
>
> Hum.  Perhaps that could be fixed, but:
> > Even if I disable this code the
> > store-flag optimizations no longer handle code like this anymore:
>
> [...]
>
> > (jump_insn 15 14 45 (set (pc)
> >         (if_then_else (eq (reg:CC 87)
> >                 (const_int 0 [0x0]))
> >             (label_ref 25)
> >             (pc))) 464 {*rs6000.md:12535} (insn_list 14 (nil))
> >     (expr_list:REG_DEAD (reg:CC 87)
> >         (expr_list:REG_BR_PROB (const_int 3999 [0xf9f])
> >             (nil))))
> >
> > (insn 19 45 20 (set (reg:SI 84)
> >         (mem/f:SI (lo_sum:SI (reg/f:SI 86)
> >                 (symbol_ref:SI ("@__dso_handle"))) 3)) 286
> > {*movsi_internal1} (nil)
> >     (expr_list:REG_DEAD (reg/f:SI 86)
> >         (nil)))
>
> Well?  What exactly do you want done?  There's no conditional load
> on powerpc.  Or are you suggesting this might be doable because the
> address is supposed to be non-trapping?  I didn't think yall had
> conditional moves either though...

gcc-2.95 did this:

(insn 9 8 10 (set (reg:SI 86)
        (high:SI (symbol_ref:SI ("@__dso_handle")))) 417 {elf_high} (nil)
    (expr_list:REG_EQUAL (high:SI (symbol_ref:SI ("@__dso_handle")))
        (nil)))
 
(insn 10 9 56 (set (reg:SI 85)
        (lo_sum:SI (reg:SI 86)
            (symbol_ref:SI ("@__dso_handle")))) 418 {elf_low} (nil)
    (expr_list:REG_EQUAL (symbol_ref:SI ("@__dso_handle"))
        (nil)))
 
(insn 56 10 57 (parallel[
            (set (reg:SI 94)
                (abs:SI (reg:SI 85)))
            (clobber (scratch:SI))
        ] ) 83 {abssi2_nopower} (nil)
    (nil))
 
(insn 57 56 59 (set (reg:SI 95)
        (neg:SI (reg:SI 94))) 88 {negsi2} (nil)
    (nil))
 
(insn 59 57 61 (set (reg:SI 96)
        (ashiftrt:SI (reg:SI 95)
            (const_int 31 [0x1f]))) 230 {ashrsi3_no_power} (nil)
    (nil))
 
(insn 61 59 11 (set (reg:SI 92)
        (reg:SI 96)) 423 {movsi+1} (nil)
    (nil))
 
(insn 11 61 50 (set (reg:CC 87)
        (compare:CC (reg:SI 85)
            (const_int 0 [0x0]))) 558 {sleu+1} (nil)
    (nil))
 
(insn 50 11 54 (set (reg:SI 84)
        (const_int 0 [0x0])) 423 {movsi+1} (nil)
    (expr_list:REG_EQUAL (const_int 0 [0x0])
        (nil)))
 
(insn 54 50 62 (set (reg:SI 90)
        (mem/f:SI (lo_sum:SI (reg:SI 86)
                (symbol_ref:SI ("@__dso_handle"))) 0)) 423 {movsi+1} (nil)
    (nil))
 
(insn 62 54 64 (parallel[
            (set (reg:SI 97)
                (and:SI (reg:SI 90)
                    (reg:SI 96)))
            (clobber (scratch:CC))
        ] ) 121 {andsi3} (nil)
    (nil))

This was controlled by BRANCH_COST. Right now I can set BRANCH_COST to 100 
and gcc3 still won't optimize it into branchless code.

> > Nevertheless, I still think we should bring in at least a minimum patch
> > into the branch, introducing SYMBOL_REF_WEAK, set it  in make_decl_rtl,
> > and evaluate it in rtx_addr_can_trap_p. I  don't want to get bitten by
> > that problem again and rtx_addr_can_trap_p is such a central routine that
> > I don't feel comfortable if we don't do something about it for 3.0.
>
> Frankly, I agree.

Good :-).

Franz.