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Re: x86-64 merger part 4 - dwarf2 register maps
> > ! #define DBX_REGISTER_NUMBER(n) \
> > ! (TARGET_64BIT ? dbx64_register_map[n] : dbx_register_map[n])
>
> You'll want to change all the other definitions in the other files too.
Oops - I didn't know about them. Would be OK to do that by separate patch
(or as pre-approved change?)
>
> > ! ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, TARGET_64BIT ? -8 : -4))\
> > ! : gen_rtx_MEM (Pmode, plus_constant (FRAME, TARGET_64BIT ? 8 : 4)))
> [...]
> > ! #define INCOMING_FRAME_SP_OFFSET (TARGET_64BIT ? 8 : 4)
>
> Consider using UNITS_PER_WORD in more places.
Huh - I see :)
>
> > + int const dbx64_register_map[FIRST_PSEUDO_REGISTER] =
> > + {
> > + 0, 1, 2, 3, 4, 5, 6, 7, /* general regs */
> > + 33, 34, 35, 36, 37, 38, 39, 40 /* fp regs */
> > + -1, -1, -1, -1, -1, /* arg, flags, fpsr, dir, frame */
> > + 17, 18, 19, 20, 21, 22, 23, 24, /* SSE */
> > + 40, 41, 42, 43, 44, 45, 46, 47, /* MMX */
> > + 8,9,10,11,12,13,14,15, /* extended integer registers */
> > + 25, 26, 27, 28, 29, 30, 31, 32, /* extended SSE registers */
> > + };
>
> Surely there's a typo here. 16 isn't used, and 40 is used twice.
16 is the return column, so I don't think we can incude it... doubling 40 is
unfortunate... I remember fixing that bug, but apparently the fix is not
here...
Would be patch OK with:
> > + int const dbx64_register_map[FIRST_PSEUDO_REGISTER] =
> > + {
> > + 0, 1, 2, 3, 4, 5, 6, 7, /* general regs */
> > + 33, 34, 35, 36, 37, 38, 39, 40 /* fp regs */
> > + -1, -1, -1, -1, -1, /* arg, flags, fpsr, dir, frame */
> > + 17, 18, 19, 20, 21, 22, 23, 24, /* SSE */
> > + 41, 42, 43, 44, 45, 46, 47, 48, /* MMX */
> > + 8,9,10,11,12,13,14,15, /* extended integer registers */
> > + 25, 26, 27, 28, 29, 30, 31, 32, /* extended SSE registers */
> > + };
Honza
>
>
> r~