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Re: [patches] Re: x86-64 merger part 3 - extended registers


> On Thu, Mar 08, 2001 at 08:46:25PM +0100, Jan Hubicka wrote:
> > ! #define FIRST_PSEUDO_REGISTER 53
> >   
> >   /* Number of hardware registers that go into the DWARF-2 unwind info.
> >      If not defined, equals FIRST_PSEUDO_REGISTER.  */
> 
> You'll need to conditionally extended the size of the dwarf2
> array as well, since some of the new registers are call-saved.
Yes, I am having patch for that - I just decided to make it separate
patch - I am using another register table and so.
So I came to conclusion that I will send it separately.
> 
> > !    The value is an mask - bit 1 is set for fixed registers
> > !    for 32bit target, while 2 is set for fixed registers for 64bit.
> > !    Proper value is computed in the CONDITIONAL_REGISTER_USAGE.
> > ! */
> >   #define CALL_USED_REGISTERS					\
> 
> Please fix the "fixed register" commentary here.
Uh, thanks..
> 
> > + #define ANY_QI_REG_P(X) (TARGET_64BIT ? 1 : QI_REG_P (X))
> 
> "1" isn't correct.  Surely you want to return true for
> general registers only.
It is used only in .md file once the 'r' constraint is matched.  But
I agree it is cleaner to test for general reg.
Can this be OK with adding GENERAL_REGNO_P and GENERAL_REG_P macros
and use it here?

Honza
> 
> > +   /* Irritantingly AMD extended registers use different naming convention
> 
> "Irritatingly, "
> 
> 
> r~


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