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PA PIC cleanup
- To: gcc-patches at gcc dot gnu dot org
- Subject: PA PIC cleanup
- From: Jeffrey A Law <law at redhat dot com>
- Date: Mon, 19 Feb 2001 20:30:37 -0700
- Reply-To: law at redhat dot com
This patch merges the problem pic pattern to load the address of a symbol
out of the DLT via a LO_SUM memory reference into the standard movsi/movdi
patterns.
The net result being that it should be possible to build libstdc++-v3 for
PA32 now. C++ test results aren't great, but the biggest problem appears
to be a bug in the HPUX nm program (it's dumping core). I'm downloading
the latest patchkit from HP to see if it has a fix.
PA64 can also be built after hacking around the REG_EQUIV problems and
some unportable code in libstdc++-v3.
* pa.c (move_operand): Accept code to load the address of a
symbol out of the DLT as a valid move operand.
(print_operand, case 'A'): New to handle generating a DLT
reference for a LO_SUM expression.
* pa.h (EXTRA_CONSTRAINT): Handle 'A' for DLT LO_SUM references.
* pa.md (movsi, movdi patterns): Allow DLT LO_SUM references.
Index: pa.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/pa/pa.c,v
retrieving revision 1.93.2.3
diff -c -3 -p -r1.93.2.3 pa.c
*** pa.c 2001/02/18 07:32:56 1.93.2.3
--- pa.c 2001/02/20 03:13:12
*************** move_operand (op, mode)
*** 377,389 ****
op = XEXP (op, 0);
! /* The LO_SUM part of a DLT reference is not considered a move_operand;
! we must reject it here since it must be accepted by memory_address_p.
*/
if (GET_CODE (op) == LO_SUM
&& GET_CODE (XEXP (op, 0)) == REG
&& REG_OK_FOR_BASE_P (XEXP (op, 0))
! && GET_CODE (XEXP (op, 1)) == UNSPEC)
! return 0;
/* Since move_operand is only used for source operands, we can always
allow scaled indexing! */
--- 377,390 ----
op = XEXP (op, 0);
! /* We consider a LO_SUM DLT reference a move_operand now since it has
! been merged into the normal movsi/movdi patterns. */
if (GET_CODE (op) == LO_SUM
&& GET_CODE (XEXP (op, 0)) == REG
&& REG_OK_FOR_BASE_P (XEXP (op, 0))
! && GET_CODE (XEXP (op, 1)) == UNSPEC
! && GET_MODE (op) == Pmode)
! return 1;
/* Since move_operand is only used for source operands, we can always
allow scaled indexing! */
*************** print_operand (file, x, code)
*** 3883,3888 ****
--- 3884,3900 ----
}
else
break;
+ case 'A':
+ {
+ rtx xoperands[2];
+
+ xoperands[0] = XEXP (XEXP (x, 0), 0);
+ xoperands[1] = XVECEXP (XEXP (XEXP (x, 0), 1), 0, 0);
+ output_global_address (file, xoperands[1], 0);
+ fprintf (file, "(%s)", reg_names [REGNO (xoperands[0])]);
+ return;
+ }
+
case 'C': /* Plain (C)ondition */
case 'X':
switch (GET_CODE (x))
Index: pa.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/pa/pa.h,v
retrieving revision 1.103
diff -c -3 -p -r1.103 pa.h
*** pa.h 2001/02/01 04:51:24 1.103
--- pa.h 2001/02/20 03:13:17
*************** extern int may_call_alloca;
*** 1187,1194 ****
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
: ((C) == 'U' ? \
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
: ((C) == 'S' ? \
! (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0)))))
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
--- 1187,1201 ----
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
: ((C) == 'U' ? \
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
+ : ((C) == 'A' ? \
+ (GET_CODE (OP) == MEM \
+ && GET_CODE (XEXP (OP, 0)) == LO_SUM \
+ && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
+ && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
+ && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
+ && GET_MODE (XEXP (OP, 0)) == Pmode) \
: ((C) == 'S' ? \
! (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
Index: pa.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/pa/pa.md,v
retrieving revision 1.81
diff -c -3 -p -r1.81 pa.md
*** pa.md 2001/02/01 04:51:24 1.81
--- pa.md 2001/02/20 03:13:26
***************
*** 2098,2110 ****
(define_insn ""
[(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand"
! "=r,r,r,r,r,Q,*q,!f,f,*TR")
(match_operand:SI 1 "move_operand"
! "r,J,N,K,RQ,rM,rM,!fM,*RT,f"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& ! TARGET_SOFT_FLOAT"
"@
copy %1,%0
ldi %1,%0
ldil L'%1,%0
--- 2098,2111 ----
(define_insn ""
[(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand"
! "=r,r,r,r,r,r,Q,*q,!f,f,*TR")
(match_operand:SI 1 "move_operand"
! "A,r,J,N,K,RQ,rM,rM,!fM,*RT,f"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& ! TARGET_SOFT_FLOAT"
"@
+ ldw RT'%A1,%0
copy %1,%0
ldi %1,%0
ldil L'%1,%0
***************
*** 2115,2133 ****
fcpy,sgl %f1,%0
fldw%F1 %1,%0
fstw%F0 %1,%0"
! [(set_attr "type" "move,move,move,shift,load,store,move,fpalu,fpload,fpstor
e")
(set_attr "pa_combine_type" "addmove")
! (set_attr "length" "4,4,4,4,4,4,4,4,4,4")])
(define_insn ""
[(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand"
! "=r,r,r,r,r,Q,*q")
(match_operand:SI 1 "move_operand"
! "r,J,N,K,RQ,rM,rM"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& TARGET_SOFT_FLOAT"
"@
copy %1,%0
ldi %1,%0
ldil L'%1,%0
--- 2116,2135 ----
fcpy,sgl %f1,%0
fldw%F1 %1,%0
fstw%F0 %1,%0"
! [(set_attr "type" "load,move,move,move,shift,load,store,move,fpalu,fpload,f
pstore")
(set_attr "pa_combine_type" "addmove")
! (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4")])
(define_insn ""
[(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand"
! "=r,r,r,r,r,r,Q,*q")
(match_operand:SI 1 "move_operand"
! "A,r,J,N,K,RQ,rM,rM"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& TARGET_SOFT_FLOAT"
"@
+ ldw RT'%A1,%0
copy %1,%0
ldi %1,%0
ldil L'%1,%0
***************
*** 2135,2143 ****
ldw%M1 %1,%0
stw%M0 %r1,%0
mtsar %r1"
! [(set_attr "type" "move,move,move,move,load,store,move")
(set_attr "pa_combine_type" "addmove")
! (set_attr "length" "4,4,4,4,4,4,4")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
--- 2137,2145 ----
ldw%M1 %1,%0
stw%M0 %r1,%0
mtsar %r1"
! [(set_attr "type" "load,move,move,move,move,load,store,move")
(set_attr "pa_combine_type" "addmove")
! (set_attr "length" "4,4,4,4,4,4,4,4")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
***************
*** 2346,2386 ****
[(set_attr "type" "binary")
(set_attr "length" "4")])
- ; We need this to make sure CSE doesn't simplify a memory load with a
- ; symbolic address, whose content it think it knows. For PIC, what CSE
- ; think is the real value will be the address of that value.
- (define_insn ""
- [(set (match_operand:SI 0 "register_operand" "=r")
- (mem:SI
- (lo_sum:SI (match_operand:SI 1 "register_operand" "r")
- (unspec:SI
- [(match_operand:SI 2 "symbolic_operand" "")] 0))))]
- ""
- "*
- {
- if (flag_pic != 2)
- abort ();
- return \"ldw RT'%G2(%1),%0\";
- }"
- [(set_attr "type" "load")
- (set_attr "length" "4")])
-
- (define_insn ""
- [(set (match_operand:DI 0 "register_operand" "=r")
- (mem:DI
- (lo_sum:DI (match_operand:DI 1 "register_operand" "r")
- (unspec:DI
- [(match_operand:DI 2 "symbolic_operand" "")] 0))))]
- "TARGET_64BIT"
- "*
- {
- if (flag_pic != 2)
- abort ();
- return \"ldd RT'%G2(%1),%0\";
- }"
- [(set_attr "type" "load")
- (set_attr "length" "4")])
-
;; Always use addil rather than ldil;add sequences. This allows the
;; HP linker to eliminate the dp relocation if the symbolic operand
;; lives in the TEXT space.
--- 2348,2353 ----
***************
*** 3156,3168 ****
(define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
! "=r,r,r,r,r,Q,*q,!f,f,*TR")
(match_operand:DI 1 "move_operand"
! "r,J,N,K,RQ,rM,rM,!fM,*RT,f"))]
"(register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode))
&& ! TARGET_SOFT_FLOAT && TARGET_64BIT"
"@
copy %1,%0
ldi %1,%0
ldil L'%1,%0
--- 3123,3136 ----
(define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
! "=r,r,r,r,r,r,Q,*q,!f,f,*TR")
(match_operand:DI 1 "move_operand"
! "A,r,J,N,K,RQ,rM,rM,!fM,*RT,f"))]
"(register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode))
&& ! TARGET_SOFT_FLOAT && TARGET_64BIT"
"@
+ ldd RT'%A1,%0
copy %1,%0
ldi %1,%0
ldil L'%1,%0
***************
*** 3173,3181 ****
fcpy,dbl %f1,%0
fldd%F1 %1,%0
fstd%F0 %1,%0"
! [(set_attr "type" "move,move,move,shift,load,store,move,fpalu,fpload,fpstor
e")
(set_attr "pa_combine_type" "addmove")
! (set_attr "length" "4,4,4,4,4,4,4,4,4,4")])
(define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
--- 3141,3149 ----
fcpy,dbl %f1,%0
fldd%F1 %1,%0
fstd%F0 %1,%0"
! [(set_attr "type" "load,move,move,move,shift,load,store,move,fpalu,fpload,f
pstore")
(set_attr "pa_combine_type" "addmove")
! (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4")])
(define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"