[VXWORKS PPC 2.95.3] vxworks-abicompat.patch

["Dave Korn" <davek-ml at ntlworld dot com>]

  VxWorks is based on a 2.7.2 implementation of eabi, which only aligned
floating point doubles to 4 byte alignment; eabi actually specifies 8 byte
alignment, and this has been fixed in 2.95.x.  So we need an option to
generate bugwardly-compatible code, and this provides it: -mvxcompat272


diff -c3prN /gcc.orig/gcc/gcc/config/rs6000/rs6000.c
/gcc.dev/gcc/gcc/config/rs6000/rs6000.c
*** /gcc.orig/gcc/gcc/config/rs6000/rs6000.c Mon Jan 15 05:28:54 2001
--- /gcc.dev/gcc/gcc/config/rs6000/rs6000.c Sat Jan 27 21:11:50 2001
*************** function_arg_padding (mode, type)
*** 1418,1424 ****

     Windows NT wants anything >= 8 bytes to be double word aligned.

!    V.4 wants long longs to be double word aligned.  */

  int
  function_arg_boundary (mode, type)
--- 1418,1425 ----

     Windows NT wants anything >= 8 bytes to be double word aligned.

!    V.4 wants long longs to be double word aligned.
!    WRS272 does not align DFmode to 64              */

  int
  function_arg_boundary (mode, type)
*************** function_arg_boundary (mode, type)
*** 1426,1432 ****
       tree type;
  {
    if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
!       && (mode == DImode || mode == DFmode))
      return 64;

    if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
--- 1427,1433 ----
       tree type;
  {
    if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
!       && (mode == DImode || ((!TARGET_VXCOMPAT272) && mode == DFmode)))
      return 64;

    if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
*************** function_arg_advance (cum, mode, type, n
*** 1460,1466 ****
       cum->fregno++;
     else
       {
!        if (mode == DFmode)
           cum->words += cum->words & 1;
         cum->words += RS6000_ARG_SIZE (mode, type, 1);
       }
--- 1461,1468 ----
       cum->fregno++;
     else
       {
!         /* DFmode is 32-, not 64- aligned on stack in 272 abi */
!        if (mode == DFmode && (!TARGET_VXCOMPAT272))
           cum->words += cum->words & 1;
         cum->words += RS6000_ARG_SIZE (mode, type, 1);
       }
diff -c3prN /gcc.orig/gcc/gcc/config/rs6000/rs6000.h
/gcc.dev/gcc/gcc/config/rs6000/rs6000.h
*** /gcc.orig/gcc/gcc/config/rs6000/rs6000.h Fri Dec 22 20:39:59 2000
--- /gcc.dev/gcc/gcc/config/rs6000/rs6000.h Sat Jan 13 03:39:12 2001
*************** extern int target_flags;
*** 279,284 ****
--- 279,287 ----
  /* Disable fused multiply/add operations */
  #define MASK_NO_FUSED_MADD 0x00020000

+ /* Generate backwardly compatible v272 eabi */
+ #define MASK_VXCOMPAT272    0x00040000
+
  #define TARGET_POWER  (target_flags & MASK_POWER)
  #define TARGET_POWER2  (target_flags & MASK_POWER2)
  #define TARGET_POWERPC  (target_flags & MASK_POWERPC)
*************** extern int target_flags;
*** 297,302 ****
--- 300,306 ----
  #define TARGET_STRING_SET (target_flags & MASK_STRING_SET)
  #define TARGET_NO_UPDATE (target_flags & MASK_NO_UPDATE)
  #define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD)
+ #define TARGET_VXCOMPAT272    (target_flags & MASK_VXCOMPAT272)

  #define TARGET_32BIT  (! TARGET_64BIT)
  #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
diff -c3prN /gcc.orig/gcc/gcc/config/rs6000/vxppc.h
/gcc.dev/gcc/gcc/config/rs6000/vxppc.h
*** /gcc.orig/gcc/gcc/config/rs6000/vxppc.h Mon May 17 02:30:56 1999
--- /gcc.dev/gcc/gcc/config/rs6000/vxppc.h Mon Jan 29 23:41:20 2001
*************** Boston, MA 02111-1307, USA.  */
*** 22,27 ****
--- 22,35 ----

  #include "rs6000/sysv4.h"

+ /*   This option makes gcc emit code that uses the variant (partial)
+    implementation of eabi that was current at the time of 2.7.2      */
+
+ #undef EXTRA_SUBTARGET_SWITCHES
+ #define EXTRA_SUBTARGET_SWITCHES \
+           { "vxcompat272",  MASK_VXCOMPAT272  },    \
+           { "no-vxcompat272",  -MASK_VXCOMPAT272  },
+
  /* ??? This file redefines CPP_SPEC which is wrong.  It should instead define
     one of the extra specs that gets included in CPP_SPEC.  For instance,
     CPP_OS_DEFAULT_SPEC.  The mrelocatable line was copied from
CPP_SYSV_SPEC.
*************** Boston, MA 02111-1307, USA.  */
*** 29,34 ****
--- 37,43 ----

  #undef CPP_SPEC
  #define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_sysv) %(cpp_endian) %(cpp_cpu) \
+ %{mvxcompat272: -D__VXCOMPAT272__} \
  %{mads: %(cpp_os_ads) } \
  %{myellowknife: %(cpp_os_yellowknife) } \
  %{mmvme: %(cpp_os_mvme) } \