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x86 shift flags fix
- To: gcc-patches at gcc dot gnu dot org
- Subject: x86 shift flags fix
- From: Richard Henderson <rth at redhat dot com>
- Date: Tue, 16 Jan 2001 09:31:36 -0800
Fri Sep 15 19:45:55 MET DST 2000 Jan Hubicka <jh@suse.cz>
* i386.h (CCGC, CCGCO): New modes.
(SELECT_CC_MODE): Move offline to ....
[...]
(shift patterns): Use CCGOCmode for all shifts except for sar.
Actually, we must use CCGOCmode for sar as well.
The attached test case shows why.
The bulk of the patch is actually comment/insn name tidying.
I suppose I could have left those for after...
r~
* config/i386/i386.h: Fix comment typo.
* config/i386/i386.md (shift+compare pattern names): s/cmpno/cmp/
(ashr+compare patterns): Match CCGOCmode not CCNOmode.
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.h,v
retrieving revision 1.145
diff -c -p -d -r1.145 i386.h
*** i386.h 2001/01/15 23:43:10 1.145
--- i386.h 2001/01/16 17:21:22
*************** while (0)
*** 2505,2511 ****
unspecified garbage in the Carry flag. This mode is used
by inc/dec instructions.
! Add CCGCO to indicate comparisons agains zero that allows
unspecified garbage in the Carry and Overflow flag. This
mode is used to simulate comparisons of (a-b) and (a+b)
against zero using sub/cmp/add operations.
--- 2505,2511 ----
unspecified garbage in the Carry flag. This mode is used
by inc/dec instructions.
! Add CCGOC to indicate comparisons agains zero that allows
unspecified garbage in the Carry and Overflow flag. This
mode is used to simulate comparisons of (a-b) and (a+b)
against zero using sub/cmp/add operations.
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.200
diff -c -p -d -r1.200 i386.md
*** i386.md 2001/01/14 09:14:03 1.200
--- i386.md 2001/01/16 17:21:23
***************
*** 7715,7721 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashlsi3_cmpno"
[(set (reg 17)
(compare
(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
--- 7715,7721 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashlsi3_cmp"
[(set (reg 17)
(compare
(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
***************
*** 7844,7850 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashlhi3_cmpno"
[(set (reg 17)
(compare
(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
--- 7844,7850 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashlhi3_cmp"
[(set (reg 17)
(compare
(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
***************
*** 8011,8017 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashlqi3_cmpno"
[(set (reg 17)
(compare
(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0")
--- 8011,8017 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashlqi3_cmp"
[(set (reg 17)
(compare
(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0")
***************
*** 8205,8211 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrsi3_one_bit_cmpno"
[(set (reg 17)
(compare
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
--- 8205,8211 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrsi3_one_bit_cmp"
[(set (reg 17)
(compare
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
***************
*** 8213,8219 ****
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCNOmode)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)
&& ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
"sar{l}\\t%0"
--- 8213,8219 ----
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCGOCmode)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)
&& ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
"sar{l}\\t%0"
***************
*** 8226,8232 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrsi3_cmpno"
[(set (reg 17)
(compare
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
--- 8226,8232 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrsi3_cmp"
[(set (reg 17)
(compare
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
***************
*** 8234,8240 ****
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCNOmode)
&& ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
"sar{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")
--- 8234,8240 ----
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCGOCmode)
&& ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
"sar{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")
***************
*** 8277,8283 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrhi3_one_bit_cmpno"
[(set (reg 17)
(compare
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
--- 8277,8283 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrhi3_one_bit_cmp"
[(set (reg 17)
(compare
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
***************
*** 8285,8291 ****
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCNOmode)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)
&& ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
"sar{w}\\t%0"
--- 8285,8291 ----
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCGOCmode)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)
&& ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
"sar{w}\\t%0"
***************
*** 8298,8304 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrhi3_cmpno"
[(set (reg 17)
(compare
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
--- 8298,8304 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrhi3_cmp"
[(set (reg 17)
(compare
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
***************
*** 8306,8312 ****
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCNOmode)
&& ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
"sar{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")
--- 8306,8312 ----
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCGOCmode)
&& ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
"sar{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")
***************
*** 8349,8355 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrqi3_cmpno_one_bit"
[(set (reg 17)
(compare
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
--- 8349,8355 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrqi3_one_bit_cmp"
[(set (reg 17)
(compare
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
***************
*** 8357,8363 ****
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCNOmode)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)
&& ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
"sar{b}\\t%0"
--- 8357,8363 ----
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCGOCmode)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO)
&& ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
"sar{b}\\t%0"
***************
*** 8370,8376 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrqi3_cmpno"
[(set (reg 17)
(compare
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
--- 8370,8376 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*ashrqi3_cmp"
[(set (reg 17)
(compare
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
***************
*** 8378,8384 ****
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCNOmode)
&& ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
"sar{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")
--- 8378,8384 ----
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))]
! "ix86_match_ccmode (insn, CCGOCmode)
&& ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
"sar{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")
***************
*** 8478,8484 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrsi3_cmpno_one_bit"
[(set (reg 17)
(compare
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
--- 8478,8484 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrsi3_one_bit_cmp"
[(set (reg 17)
(compare
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
***************
*** 8499,8505 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrsi3_cmpno"
[(set (reg 17)
(compare
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
--- 8499,8505 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrsi3_cmp"
[(set (reg 17)
(compare
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
***************
*** 8550,8556 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrhi3_cmpno_one_bit"
[(set (reg 17)
(compare
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
--- 8550,8556 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrhi3_one_bit_cmp"
[(set (reg 17)
(compare
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
***************
*** 8571,8577 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrhi3_cmpno"
[(set (reg 17)
(compare
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
--- 8571,8577 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrhi3_cmp"
[(set (reg 17)
(compare
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
***************
*** 8622,8628 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrqi2_cmpno_one_bit"
[(set (reg 17)
(compare
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
--- 8622,8628 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrqi2_one_bit_cmp"
[(set (reg 17)
(compare
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
***************
*** 8643,8649 ****
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrqi2_cmpno"
[(set (reg 17)
(compare
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
--- 8643,8649 ----
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
! (define_insn "*lshrqi2_cmp"
[(set (reg 17)
(compare
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
Index: testsuite/gcc.c-torture/execute/20010116-1.c
===================================================================
RCS file: 20010116-1.c
diff -N 20010116-1.c
*** /dev/null Tue May 5 13:32:27 1998
--- 20010116-1.c Tue Jan 16 09:21:23 2001
***************
*** 0 ****
--- 1,32 ----
+ /* Distilled from optimization/863. */
+
+ extern void abort (void);
+ extern void exit (int);
+ extern void ok (int);
+
+ typedef struct
+ {
+ int x, y, z;
+ } Data;
+
+ void find (Data *first, Data *last)
+ {
+ int i;
+ for (i = (last - first) >> 2; i > 0; --i)
+ ok(i);
+ abort ();
+ }
+
+ void ok(int i)
+ {
+ if (i != 1)
+ abort ();
+ exit (0);
+ }
+
+ int
+ main ()
+ {
+ Data DataList[4];
+ find (DataList + 0, DataList + 4);
+ }