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Re: patch for exception handlers in PIC code on ARM
- To: Richard Henderson <rth at redhat dot com>
- Subject: Re: patch for exception handlers in PIC code on ARM
- From: Richard Earnshaw <rearnsha at arm dot com>
- Date: Mon, 15 Jan 2001 18:53:26 +0000
- Cc: gcc-patches at gcc dot gnu dot org
- Cc: rearnsha at arm dot com
- Organization: ARM Ltd.
- Reply-To: rearnsha at arm dot com
> [ You seem to only have send the mail to me. But since you are
> also talking to Phil it is clear you didn't mean to. So I've
> quoted the text in its entirety in cc'ing it back to gcc-patches. ]
>
No, I sent the mail to everyone. I suspect your machine isn't properly
displaying multiple cc lines. This issue has come up before, and think it
was concluded that it can also be due to a buggy sendmail somewhere.
> > I haven't had chance to look at the code yet, but I'd be surprised if they
> > got it right for the ARM's hardware floating point registers. Special
> > non-trapping instructions have to be used for this (sfm/lfm or stfe/ldfe
> > in some compilation variants), and currently only the prologue and
> > epilogue code know what to do. Also longjmp will have to know how to
> > switch to/from Thumb mode in some variants.
>
> But that's exactly why things are done the way they are.
>
> __builtin_longjmp doesn't touch anything it doesn't have to; all saving
> and restoring of registers is done by the prologue and epilogue code of
> the routine containing the __builtin_setjmp.
As I said, I haven't had chance to investigate yet; if it does DTRT, then
great.
R.