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Re: Bug in ARM long long multiply patterns.
- To: Nick Clifton <nickc at redhat dot com>
- Subject: Re: Bug in ARM long long multiply patterns.
- From: Richard Earnshaw <rearnsha at arm dot com>
- Date: Thu, 09 Nov 2000 11:02:42 +0000
- Cc: gcc-patches at gcc dot gnu dot org
- Cc: rearnsha at arm dot com
- Organization: ARM Ltd.
- Reply-To: rearnsha at arm dot com
Hmm, there's even more wrong with this pattern :-(
(define_insn "*mulsidi3adddi"
[(set (match_operand:DI 0 "s_register_operand" "=&r,&r,&r")
(plus:DI
(mult:DI
(sign_extend:DI (match_operand:SI 2 "s_register_operand" "r,0,1"))
(sign_extend:DI (match_operand:SI 1 "s_register_operand" "%r,r,r")))
(match_dup 0)))]
"TARGET_ARM && arm_fast_multiply"
"smlal%?\\t%Q0, %R0, %1, %2"
[(set_attr "type" "mult")
(set_attr "predicable" "yes")]
)
It isn't legal to tie operand 2 to operand 0 either, since the modes are
different.