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[patch] avr port: optimize shifts
- To: denisc at overta dot ru
- Subject: [patch] avr port: optimize shifts
- From: Marek Michalkiewicz <marekm at linux dot org dot pl>
- Date: Sat, 30 Sep 2000 21:15:30 +0200 (CEST)
- CC: gcc-patches at gcc dot gnu dot org, marekm at linux dot org dot pl
2000-09-30 Marek Michalkiewicz <marekm@linux.org.pl>
* config/avr/avr.c (ashlhi3_out, ashlsi3_out, ashrhi3_out,
ashrsi3_out, lshrhi3_out, lshrsi3_out): Optimize more cases
with known shift count.
* config/avr/avr.md (ashlsi3, ashrsi3, lshrsi3):
New alternative for shift count 2 with no scratch register.
(ashlhi3, ashlsi3): Change "cc" attribute from "clobber" to
"set_n" for shift counts 1 and 2.
diff -rc3p orig/egcs/gcc/config/avr/avr.c egcs/gcc/config/avr/avr.c
*** orig/egcs/gcc/config/avr/avr.c Mon Sep 25 18:53:26 2000
--- egcs/gcc/config/avr/avr.c Sat Sep 30 20:40:22 2000
*************** ashlhi3_out (insn, operands, len)
*** 2870,2877 ****
switch (INTVAL (operands[2]))
{
- default: len = t; break;
-
case 1:
*len = 2;
return (AS1 (lsl,%A0) CR_TAB
--- 2870,2875 ----
*************** ashlhi3_out (insn, operands, len)
*** 2881,2896 ****
*len = 4;
return (AS1 (lsl,%A0) CR_TAB
AS1 (rol,%B0) CR_TAB
! AS1 (lsl,%0) CR_TAB
AS1 (rol,%B0));
case 8:
if (true_regnum (operands[0]) + 1 == true_regnum (operands[1]))
return *len = 1, AS1 (clr,%A0);
else
return *len = 2, (AS2 (mov,%B0,%A1) CR_TAB
AS1 (clr,%A0));
}
}
if (len)
*len = 4;
--- 2879,2981 ----
*len = 4;
return (AS1 (lsl,%A0) CR_TAB
AS1 (rol,%B0) CR_TAB
! AS1 (lsl,%A0) CR_TAB
AS1 (rol,%B0));
+ case 7:
+ *len = 5;
+ return (AS1 (lsr,%B0) CR_TAB
+ AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (ror,%B0) CR_TAB
+ AS1 (ror,%A0));
+
case 8:
if (true_regnum (operands[0]) + 1 == true_regnum (operands[1]))
return *len = 1, AS1 (clr,%A0);
else
return *len = 2, (AS2 (mov,%B0,%A1) CR_TAB
AS1 (clr,%A0));
+
+ case 9:
+ *len = 3;
+ return (AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (lsl,%B0));
+
+ case 10:
+ *len = 4;
+ return (AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (lsl,%B0) CR_TAB
+ AS1 (lsl,%B0));
+
+ case 11:
+ *len = 5;
+ return (AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (lsl,%B0) CR_TAB
+ AS1 (lsl,%B0) CR_TAB
+ AS1 (lsl,%B0));
+
+ case 12:
+ if (test_hard_reg_class (LD_REGS, operands[0]))
+ {
+ *len = 4;
+ return (AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (swap,%B0) CR_TAB
+ AS2 (andi,%B0,0xf0));
+ }
+ /* %3 is a scratch register from class LD_REGS */
+ *len = 5;
+ return (AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (swap,%B0) CR_TAB
+ AS2 (ldi,%3,0xf0) CR_TAB
+ AS2 (and,%B0,%3));
+
+ case 13:
+ if (test_hard_reg_class (LD_REGS, operands[0]))
+ {
+ *len = 5;
+ return (AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (swap,%B0) CR_TAB
+ AS1 (lsl,%B0) CR_TAB
+ AS2 (andi,%B0,0xe0));
+ }
+ if (AVR_ENHANCED)
+ {
+ *len = 5;
+ return (AS2 (ldi,%3,0x20) CR_TAB
+ AS2 (mul,%A0,%3) CR_TAB
+ AS2 (mov,%B0,r0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (clr,__zero_reg__));
+ }
+ break;
+
+ case 14:
+ if (AVR_ENHANCED)
+ {
+ *len = 5;
+ return (AS2 (ldi,%3,0x40) CR_TAB
+ AS2 (mul,%A0,%3) CR_TAB
+ AS2 (mov,%B0,r0) CR_TAB
+ AS1 (clr,%A0) CR_TAB
+ AS1 (clr,__zero_reg__));
+ }
+ break;
+
+ case 15:
+ *len = 4;
+ return (AS1 (clr,%B0) CR_TAB
+ AS1 (lsr,%A0) CR_TAB
+ AS1 (ror,%B0) CR_TAB
+ AS1 (clr,%A0));
}
+ len = t;
}
if (len)
*len = 4;
*************** ashlsi3_out (insn, operands, len)
*** 2919,2926 ****
switch (INTVAL (operands[2]))
{
- default: len = t; break;
-
case 1:
*len = 4;
return (AS1 (lsl,%A0) CR_TAB
--- 3004,3009 ----
*************** ashlsi3_out (insn, operands, len)
*** 2928,2933 ****
--- 3011,3028 ----
AS1 (rol,%C0) CR_TAB
AS1 (rol,%D0));
+ case 2:
+ /* Loop is one word smaller, but slower and needs a register. */
+ *len = 8;
+ return (AS1 (lsl,%A0) CR_TAB
+ AS1 (rol,%B0) CR_TAB
+ AS1 (rol,%C0) CR_TAB
+ AS1 (rol,%D0) CR_TAB
+ AS1 (lsl,%A0) CR_TAB
+ AS1 (rol,%B0) CR_TAB
+ AS1 (rol,%C0) CR_TAB
+ AS1 (rol,%D0));
+
case 8:
{
int reg0 = true_regnum (operands[0]);
*************** ashlsi3_out (insn, operands, len)
*** 2994,3000 ****
--- 3089,3105 ----
AS1 (clr,%B0) CR_TAB
AS1 (clr,%A0));
}
+
+ case 31:
+ *len = 6;
+ return (AS1 (clr,%D0) CR_TAB
+ AS1 (lsr,%A0) CR_TAB
+ AS1 (ror,%D0) CR_TAB
+ AS1 (clr,%C0) CR_TAB
+ AS1 (clr,%B0) CR_TAB
+ AS1 (clr,%A0));
}
+ len = t;
}
if (len)
*len = 6;
*************** ashrhi3_out (insn, operands, len)
*** 3096,3103 ****
switch (INTVAL (operands[2]))
{
- default: len = t; break;
-
case 1:
*len=2;
return (AS1 (asr,%B0) CR_TAB
--- 3201,3206 ----
*************** ashrhi3_out (insn, operands, len)
*** 3110,3115 ****
--- 3213,3225 ----
AS1 (asr,%B0) CR_TAB
AS1 (ror,%A0));
+ case 7:
+ *len = 4;
+ return (AS1 (lsl,%A0) CR_TAB
+ AS2 (mov,%A0,%B0) CR_TAB
+ AS1 (rol,%A0) CR_TAB
+ AS2 (sbc,%B0,%B0));
+
case 8:
if (true_regnum (operands[0]) != true_regnum (operands[1]) + 1)
return *len = 4, (AS2 (mov,%A0,%B1) CR_TAB
*************** ashrhi3_out (insn, operands, len)
*** 3121,3131 ****
--- 3231,3301 ----
AS2 (sbrc,%A0,7) CR_TAB
AS1 (dec,%B0));
+ case 9:
+ *len = 4;
+ return (AS2 (mov,%A0,%B0) CR_TAB
+ AS1 (lsl,%B0) CR_TAB
+ AS2 (sbc,%B0,%B0) CR_TAB
+ AS1 (asr,%A0));
+
+ case 10:
+ *len = 5;
+ return (AS2 (mov,%A0,%B0) CR_TAB
+ AS1 (lsl,%B0) CR_TAB
+ AS2 (sbc,%B0,%B0) CR_TAB
+ AS1 (asr,%A0) CR_TAB
+ AS1 (asr,%A0));
+
+ case 11:
+ if (AVR_ENHANCED && test_hard_reg_class (LD_REGS, operands[0]))
+ {
+ *len = 5;
+ return (AS2 (ldi,%3,0x20) CR_TAB
+ AS2 (muls,%B0,%3) CR_TAB
+ AS2 (mov,%A0,r1) CR_TAB
+ AS2 (sbc,%B0,%B0) CR_TAB
+ AS1 (clr,__zero_reg__));
+ }
+ break;
+
+ case 12:
+ if (AVR_ENHANCED && test_hard_reg_class (LD_REGS, operands[0]))
+ {
+ *len = 5;
+ return (AS2 (ldi,%3,0x10) CR_TAB
+ AS2 (muls,%B0,%3) CR_TAB
+ AS2 (mov,%A0,r1) CR_TAB
+ AS2 (sbc,%B0,%B0) CR_TAB
+ AS1 (clr,__zero_reg__));
+ }
+ break;
+
+ case 13:
+ if (AVR_ENHANCED && test_hard_reg_class (LD_REGS, operands[0]))
+ {
+ *len = 5;
+ return (AS2 (ldi,%3,0x08) CR_TAB
+ AS2 (muls,%B0,%3) CR_TAB
+ AS2 (mov,%A0,r1) CR_TAB
+ AS2 (sbc,%B0,%B0) CR_TAB
+ AS1 (clr,__zero_reg__));
+ }
+ break;
+
+ case 14:
+ *len = 5;
+ return (AS1 (lsl,%B0) CR_TAB
+ AS2 (sbc,%A0,%A0) CR_TAB
+ AS1 (lsl,%B0) CR_TAB
+ AS2 (mov,%B0,%A0) CR_TAB
+ AS1 (rol,%A0));
+
case 15:
return *len = 3, (AS1 (lsl,%B0) CR_TAB
AS2 (sbc,%A0,%A0) CR_TAB
AS2 (mov,%B0,%A0));
}
+ len = t;
}
if (len)
*len = 4;
*************** ashrsi3_out (insn, operands, len)
*** 3154,3161 ****
switch (INTVAL (operands[2]))
{
- default: len = t; break;
-
case 1:
*len=4;
return (AS1 (asr,%D0) CR_TAB
--- 3324,3329 ----
*************** ashrsi3_out (insn, operands, len)
*** 3163,3168 ****
--- 3331,3348 ----
AS1 (ror,%B0) CR_TAB
AS1 (ror,%A0));
+ case 2:
+ /* Loop is one word smaller, but slower and needs a register. */
+ *len = 8;
+ return (AS1 (asr,%D0) CR_TAB
+ AS1 (ror,%C0) CR_TAB
+ AS1 (ror,%B0) CR_TAB
+ AS1 (ror,%A0) CR_TAB
+ AS1 (asr,%D0) CR_TAB
+ AS1 (ror,%C0) CR_TAB
+ AS1 (ror,%B0) CR_TAB
+ AS1 (ror,%A0));
+
case 8:
{
int reg0 = true_regnum (operands[0]);
*************** ashrsi3_out (insn, operands, len)
*** 3240,3246 ****
--- 3420,3440 ----
AS1 (com,%D0) CR_TAB
AS2 (mov,%B0,%D0) CR_TAB
AS2 (mov,%C0,%D0));
+
+ case 31:
+ if (AVR_ENHANCED)
+ return *len = 4, (AS1 (lsl,%D0) CR_TAB
+ AS2 (sbc,%A0,%A0) CR_TAB
+ AS2 (mov,%B0,%A0) CR_TAB
+ AS2 (movw,%C0,%A0));
+ else
+ return *len = 5, (AS1 (lsl,%D0) CR_TAB
+ AS2 (sbc,%A0,%A0) CR_TAB
+ AS2 (mov,%B0,%A0) CR_TAB
+ AS2 (mov,%C0,%A0) CR_TAB
+ AS2 (mov,%D0,%A0));
}
+ len = t;
}
if (len)
*len = 6;
*************** lshrhi3_out (insn, operands, len)
*** 3367,3374 ****
switch (INTVAL (operands[2]))
{
- default: len = t; break;
-
case 1:
*len = 2;
return (AS1 (lsr,%B0) CR_TAB
--- 3561,3566 ----
*************** lshrhi3_out (insn, operands, len)
*** 3380,3393 ****
AS1 (ror,%A0) CR_TAB
AS1 (lsr,%B0) CR_TAB
AS1 (ror,%A0));
!
case 8:
if (true_regnum (operands[0]) != true_regnum (operands[1]) + 1)
return *len = 2, (AS2 (mov,%A0,%B1) CR_TAB
AS1 (clr,%B0));
else
return *len = 1, AS1 (clr,%B0);
!
case 15:
*len = 4;
return (AS1 (lsl,%B0) CR_TAB
--- 3572,3664 ----
AS1 (ror,%A0) CR_TAB
AS1 (lsr,%B0) CR_TAB
AS1 (ror,%A0));
!
! case 7:
! *len = 5;
! return (AS1 (lsl,%A0) CR_TAB
! AS2 (mov,%A0,%B0) CR_TAB
! AS1 (rol,%A0) CR_TAB
! AS2 (sbc,%B0,%B0) CR_TAB
! AS1 (neg,%B0));
!
case 8:
if (true_regnum (operands[0]) != true_regnum (operands[1]) + 1)
return *len = 2, (AS2 (mov,%A0,%B1) CR_TAB
AS1 (clr,%B0));
else
return *len = 1, AS1 (clr,%B0);
!
! case 9:
! *len = 3;
! return (AS2 (mov,%A0,%B0) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (lsr,%A0));
!
! case 10:
! *len = 4;
! return (AS2 (mov,%A0,%B0) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (lsr,%A0) CR_TAB
! AS1 (lsr,%A0));
!
! case 11:
! *len = 5;
! return (AS2 (mov,%A0,%B0) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (lsr,%A0) CR_TAB
! AS1 (lsr,%A0) CR_TAB
! AS1 (lsr,%A0));
!
! case 12:
! if (test_hard_reg_class (LD_REGS, operands[0]))
! {
! *len = 4;
! return (AS2 (mov,%A0,%B0) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (swap,%A0) CR_TAB
! AS2 (andi,%A0,0x0f));
! }
! /* %3 is a scratch register from class LD_REGS */
! *len = 5;
! return (AS2 (mov,%A0,%B0) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (swap,%A0) CR_TAB
! AS2 (ldi,%3,0x0f) CR_TAB
! AS2 (and,%A0,%3));
!
! case 13:
! if (test_hard_reg_class (LD_REGS, operands[0]))
! {
! *len = 5;
! return (AS2 (mov,%A0,%B0) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (swap,%A0) CR_TAB
! AS1 (lsr,%A0) CR_TAB
! AS2 (andi,%A0,0x07));
! }
! if (AVR_ENHANCED)
! {
! *len = 5;
! return (AS2 (ldi,%3,0x08) CR_TAB
! AS2 (mul,%B0,%3) CR_TAB
! AS2 (mov,%A0,r1) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (clr,__zero_reg__));
! }
! break;
!
! case 14:
! if (AVR_ENHANCED)
! {
! *len = 5;
! return (AS2 (ldi,%3,0x04) CR_TAB
! AS2 (mul,%B0,%3) CR_TAB
! AS2 (mov,%A0,r1) CR_TAB
! AS1 (clr,%B0) CR_TAB
! AS1 (clr,__zero_reg__));
! }
! break;
!
case 15:
*len = 4;
return (AS1 (lsl,%B0) CR_TAB
*************** lshrhi3_out (insn, operands, len)
*** 3395,3400 ****
--- 3666,3672 ----
AS1 (neg,%A0) CR_TAB
AS1 (clr,%B0));
}
+ len = t;
}
if (len)
*len = 4;
*************** lshrsi3_out (insn, operands, len)
*** 3422,3436 ****
switch (INTVAL (operands[2]))
{
- default: len = t; break;
-
case 1:
*len = 4;
! return (AS1 (lsr,%D0) CR_TAB
AS1 (ror,%C0) CR_TAB
AS1 (ror,%B0) CR_TAB
AS1 (ror,%A0));
!
case 8:
{
int reg0 = true_regnum (operands[0]);
--- 3694,3718 ----
switch (INTVAL (operands[2]))
{
case 1:
*len = 4;
! return (AS1 (lsr,%D0) CR_TAB
AS1 (ror,%C0) CR_TAB
AS1 (ror,%B0) CR_TAB
AS1 (ror,%A0));
!
! case 2:
! /* Loop is one word smaller, but slower and needs a register. */
! *len = 8;
! return (AS1 (lsr,%D0) CR_TAB
! AS1 (ror,%C0) CR_TAB
! AS1 (ror,%B0) CR_TAB
! AS1 (ror,%A0) CR_TAB
! AS1 (lsr,%D0) CR_TAB
! AS1 (ror,%C0) CR_TAB
! AS1 (ror,%B0) CR_TAB
! AS1 (ror,%A0));
!
case 8:
{
int reg0 = true_regnum (operands[0]);
*************** lshrsi3_out (insn, operands, len)
*** 3487,3493 ****
--- 3769,3785 ----
return *len = 3, (AS1 (clr,%B0) CR_TAB
AS1 (clr,%C0) CR_TAB
AS1 (clr,%D0));
+
+ case 31:
+ *len = 6;
+ return (AS1 (clr,%A0) CR_TAB
+ AS2 (sbrc,%D0,7) CR_TAB
+ AS1 (inc,%A0) CR_TAB
+ AS1 (clr,%B0) CR_TAB
+ AS1 (clr,%C0) CR_TAB
+ AS1 (clr,%D0));
}
+ len = t;
}
if (len)
*len = 6;
*************** gas_output_limited_string(file, str)
*** 3893,3899 ****
{
const unsigned char *_limited_str = (unsigned char *) str;
unsigned ch;
! fprintf (file, "%s\"", STRING_ASM_OP);
for (; (ch = *_limited_str); _limited_str++)
{
int escape;
--- 4185,4191 ----
{
const unsigned char *_limited_str = (unsigned char *) str;
unsigned ch;
! fprintf (file, "\t%s\t\"", STRING_ASM_OP);
for (; (ch = *_limited_str); _limited_str++)
{
int escape;
diff -rc3p orig/egcs/gcc/config/avr/avr.md egcs/gcc/config/avr/avr.md
*** orig/egcs/gcc/config/avr/avr.md Thu Sep 21 18:21:58 2000
--- egcs/gcc/config/avr/avr.md Sat Sep 30 20:49:54 2000
***************
*** 893,911 ****
(match_operand:QI 2 "general_operand" "r,P,O,K,i,Qm")))
(clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
""
! "* return ashlhi3_out (insn,operands, NULL);"
[(set_attr "length" "7,2,4,2,5,8")
! (set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
(define_insn "ashlsi3"
! [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r")
! (ashift:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0")
! (match_operand:QI 2 "general_operand" "r,P,O,i,Qm")))
! (clobber (match_scratch:QI 3 "=X,X,X,&d,X"))]
! ""
! "* return ashlsi3_out (insn,operands, NULL);"
! [(set_attr "length" "9,4,4,7,10")
! (set_attr "cc" "clobber,clobber,clobber,clobber,clobber")])
;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
;; arithmetic shift right
--- 893,911 ----
(match_operand:QI 2 "general_operand" "r,P,O,K,i,Qm")))
(clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
""
! "* return ashlhi3_out (insn, operands, NULL);"
[(set_attr "length" "7,2,4,2,5,8")
! (set_attr "cc" "clobber,set_n,clobber,set_n,clobber,clobber")])
(define_insn "ashlsi3"
! [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
! (ashift:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0,0")
! (match_operand:QI 2 "general_operand" "r,P,O,K,i,Qm")))
! (clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
! ""
! "* return ashlsi3_out (insn, operands, NULL);"
! [(set_attr "length" "9,4,4,8,7,10")
! (set_attr "cc" "clobber,set_n,clobber,set_n,clobber,clobber")])
;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
;; arithmetic shift right
***************
*** 925,943 ****
(match_operand:QI 2 "general_operand" "r,P,K,O,i,Qm")))
(clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
""
! "* return ashrhi3_out (insn,operands, NULL);"
[(set_attr "length" "7,2,4,2,5,8")
(set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
(define_insn "ashrsi3"
! [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r")
! (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0")
! (match_operand:QI 2 "general_operand" "r,P,O,i,Qm")))
! (clobber (match_scratch:QI 3 "=X,X,X,&d,X"))]
! ""
! "* return ashrsi3_out (insn,operands, NULL);"
! [(set_attr "length" "9,4,6,7,10")
! (set_attr "cc" "clobber,clobber,clobber,clobber,clobber")])
;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
;; logical shift right
--- 925,943 ----
(match_operand:QI 2 "general_operand" "r,P,K,O,i,Qm")))
(clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
""
! "* return ashrhi3_out (insn, operands, NULL);"
[(set_attr "length" "7,2,4,2,5,8")
(set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
(define_insn "ashrsi3"
! [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
! (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0,0")
! (match_operand:QI 2 "general_operand" "r,P,O,K,i,Qm")))
! (clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
! ""
! "* return ashrsi3_out (insn, operands, NULL);"
! [(set_attr "length" "9,4,6,8,7,10")
! (set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
;; logical shift right
***************
*** 947,953 ****
(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0")
(match_operand:QI 2 "general_operand" "r,n,n,Qm")))]
""
! "* return lshrqi3_out (insn,operands, NULL);"
[(set_attr "length" "6,4,6,7")
(set_attr "cc" "clobber,set_czn,set_czn,clobber")])
--- 947,953 ----
(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0")
(match_operand:QI 2 "general_operand" "r,n,n,Qm")))]
""
! "* return lshrqi3_out (insn, operands, NULL);"
[(set_attr "length" "6,4,6,7")
(set_attr "cc" "clobber,set_czn,set_czn,clobber")])
***************
*** 957,975 ****
(match_operand:QI 2 "general_operand" "r,P,K,O,i,Qm")))
(clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
""
! "* return lshrhi3_out (insn,operands, NULL);"
[(set_attr "length" "7,2,4,2,5,8")
(set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
(define_insn "lshrsi3"
! [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r")
! (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0")
! (match_operand:QI 2 "general_operand" "r,P,O,i,Qm")))
! (clobber (match_scratch:QI 3 "=X,X,X,&d,X"))]
! ""
! "* return lshrsi3_out (insn,operands, NULL);"
! [(set_attr "length" "9,4,4,7,10")
! (set_attr "cc" "clobber,clobber,clobber,clobber,clobber")])
;; abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x)
;; abs
--- 957,975 ----
(match_operand:QI 2 "general_operand" "r,P,K,O,i,Qm")))
(clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
""
! "* return lshrhi3_out (insn, operands, NULL);"
[(set_attr "length" "7,2,4,2,5,8")
(set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
(define_insn "lshrsi3"
! [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
! (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0,0")
! (match_operand:QI 2 "general_operand" "r,P,O,K,i,Qm")))
! (clobber (match_scratch:QI 3 "=X,X,X,X,&d,X"))]
! ""
! "* return lshrsi3_out (insn, operands, NULL);"
! [(set_attr "length" "9,4,4,8,7,10")
! (set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
;; abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x)
;; abs