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RFA: Target specific, per-function initialisation of register classes

Hi Guys,

  I would like approval to apply the following patch.  It adds a new
  target macro called 'TARGET_REG_CLASS_INIT' (not too sure about the
  name...).  The point of this macro is to allow target specific, per
  function changes to be made to the register classes before local
  alloc and reload are run.

  I want this feature in order to be able to change the contents of
  the reg_alloc_order and inv_reg_alloc_order arrays on a per-function
  basis.  This would allow the ARM port to change the register alloc
  order for fast interrupt handler functions which have some registers
  banked (or saved), but which would not normally be the first
  registers chosen by gcc.

  Alternatively, if there is a better way of doing this, please could
  somebody let me know.


2000-09-20  Nick Clifton  <>

	* regclass.c (TARGET_REG_CLASS_INIT): If not defiend, define
	to nothing.
	(regclass): Invoke TARGET_REG_CLASS_INIT before initialising
	register classes.

	* tm.texi: Document new macro TARGET_REG_CLASS_INIT.

Index: regclass.c
RCS file: /cvs/gcc/egcs/gcc/regclass.c,v
retrieving revision 1.106
diff -p -w -r1.106 regclass.c
*** regclass.c	2000/09/15 02:56:02	1.106
--- regclass.c	2000/09/20 19:45:48
*************** scan_one_insn (insn, pass)
*** 1038,1043 ****
--- 1038,1047 ----
     This information can be accessed later by calling `reg_preferred_class'.
     This pass comes just before local register allocation.  */
+ #endif
  regclass (f, nregs, dump)
       rtx f;
*************** regclass (f, nregs, dump)
*** 1052,1057 ****
--- 1056,1063 ----
    costs = (struct costs *) xmalloc (nregs * sizeof (struct costs));
    reg_changes_mode = BITMAP_XMALLOC();

Index: tm.texi
RCS file: /cvs/gcc/egcs/gcc/tm.texi,v
retrieving revision 1.144
diff -p -w -r1.144 tm.texi
*** tm.texi	2000/09/07 22:24:32	1.144
--- tm.texi	2000/09/20 19:45:48
*************** mode changes to same-size modes.
*** 2145,2150 ****
--- 2145,2161 ----
  Compare this to IA-64, which extends floating-point values to 82-bits,
  and stores 64-bit integers in a different format than 64-bit doubles.
  Therefore @code{CLASS_CANNOT_CHANGE_MODE_P} is always true.
+ This macro can be used to change the contents of the register classes in
+ a target specific way on a per function basis.  It is called at the
+ start of the local alloc pass, just before the register class data
+ structures are initialised.  If defined, the macro should contain C code
+ to perform any target specific initialisation of the register classes.
+ This is used for example by the ARM port in order to change the
+ @var{REG_ALLOC_ORDER} for fast interrupt handlers.
  @end table
  Three other special macros describe which operands fit which constraint

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