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i386 ccmode fix II



Hi
This is second part of patch to fix handling of i386 compares.  It fixes bug
with shift, cmp, neg and few other patterns, that may produce incorrect results
with gt/le operators.

The situation is as follows:
1) Some instructions sets all flags correctly and thus everything works
2) inc/dec don't set carry flag, so unsigned comparisons are broken
3) add/sub/cmp can be modeled as comparison of (a+b) against 0, where overflow
   and carry flags are broken.  We can use sign bit tests, but we don't
   have all necesary jump opcodes, so we can do only ge/lt tests.
   Similar holds for shift instructions, that sets carry/overflow using strange
   rules except for sar, that do clear it.
4) Some instructions do clear the overflow flag and then we can do
   gt/le tests using normal overflow flag opcodes relying that it is clear.
   So we can all signed comparisons on conditional codes after logicals.

   Currently CCNOmode match this and quite a few patterns and mistakely in this
   category - the (a+b) cmp 0 tests in plus pattern, the shifts and negs.

The patch adds new CCmode for each of the cases.  It is quite longish, because
it needs to fix i386.md to handle them nicely - basically it just mechanically
changes the patterns to use the match_ccmode infrstructure bit (so adding new
ccmodes in future can be easy) and I've changed somehow how does jump works,
so the ix86_compare_operand now takes care to ensure that proper mode is used
and thus fewer patterns is needed.

I've also added (a-b) cmp 0 patterns.  Overall the code is about 1% shorter
and most cases are handled properly - most gains are from increased usage of
inc/dec and test opcodes.  Now all loops in all directions testing 0 use
inc/dec except for
for (i=10;i>0;i--), where dec is followed by test, since the proper test code
is missing.  Loop ought to change this for test to nonzero - I will do that later.

Passes make bootstrap check and fixes some missoptimizations problems on XaoS
fractal zoomer and bb demo.

I've also attempted to add commentary to avoid similar problems in future.

Honza

Thu Sep 14 13:12:24 MET DST 2000  Jan Hubicka  <jh@suse.cz>
	* i386-protos.h (no_comparison_operator, uno_comparison_operator): Remove.
	(ix86_comparison_operator, ix86_cc_mode): Declare
	* i386.h (CCGC, CCGCO): New modes.
	(SELECT_CC_MODE): Move offline to ....
	* i386.c (ix86_cc_mode): .... here; use new modes.
	(ix86_comparison_operator): New.
	(fcmov_comparison_operator): Ensure proper mode.
	(put_condition_mode): More sanity checking.
	(ix86_match_ccmode): Handle new modes.
	(ix86_expand_fp_compare): GEU requires CCmode.
	(ix86_expand_strlensi_unroll_1): Use emit_cmp_and_jump_insn instead of
	doing it by hand.
	* i386.md (cmp?i_ccz_1): Remove
	(cmp?i_ccno_1): Use ix86_match_ccmode.
	(cmp?i_minus_1): New.
	(cmpsi_1): New expander.
	(cmpqi_ext_1): Use match_ccmode
	(cmpqi_ext_3): New expander.
	(cmpqi_ext_3_insn): Rename from cmpqi_ext_3.
	(cmpqi_ext_4): Use match_ccmode.
	(add?i_?): Use match_ccmode.
	(add?i_6): New.
	(test?i_ccz_1): Remove
	(test?i_1): New.
	(testsi_ccno_1, testqi_ccz_1, testqi_ext_ccno_0): New expander.
	(testqi_ext_0): Use ix86_match_ccmode.
	(*xorqi_cc_ext_1): Use ix86_match_ccmode.
	(xorqi_cc_ext_1): New expander.
	(shift patterns): Use CCGOCmode for all shifts except for sar.
	(setcc_?, jcc_?, miv?icc_nic): Use ix86_comparison_operator.
	(setcc_3, jcc_3, miv?icc_c): Remove.

Index: egcs/gcc/config/i386/i386-protos.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386-protos.h,v
retrieving revision 1.26
diff -c -3 -p -r1.26 i386-protos.h
*** i386-protos.h	2000/09/08 17:36:33	1.26
--- i386-protos.h	2000/09/14 10:59:52
*************** extern int const1_operand PARAMS ((rtx, 
*** 51,65 ****
  extern int const248_operand PARAMS ((rtx, enum machine_mode));
  extern int incdec_operand PARAMS ((rtx, enum machine_mode));
  extern int reg_no_sp_operand PARAMS ((rtx, enum machine_mode));
  extern int mmx_reg_operand PARAMS ((rtx, enum machine_mode));
  extern int general_no_elim_operand PARAMS ((rtx, enum machine_mode));
  extern int nonmemory_no_elim_operand PARAMS ((rtx, enum machine_mode));
  extern int q_regs_operand PARAMS ((rtx, enum machine_mode));
  extern int non_q_regs_operand PARAMS ((rtx, enum machine_mode));
! extern int no_comparison_operator PARAMS ((rtx, enum machine_mode));
  extern int sse_comparison_operator PARAMS ((rtx, enum machine_mode));
  extern int fcmov_comparison_operator PARAMS ((rtx, enum machine_mode));
- extern int uno_comparison_operator PARAMS ((rtx, enum machine_mode));
  extern int cmp_fp_expander_operand PARAMS ((rtx, enum machine_mode));
  extern int ext_register_operand PARAMS ((rtx, enum machine_mode));
  extern int binary_fp_operator PARAMS ((rtx, enum machine_mode));
--- 51,64 ----
  extern int const248_operand PARAMS ((rtx, enum machine_mode));
  extern int incdec_operand PARAMS ((rtx, enum machine_mode));
  extern int reg_no_sp_operand PARAMS ((rtx, enum machine_mode));
  extern int mmx_reg_operand PARAMS ((rtx, enum machine_mode));
  extern int general_no_elim_operand PARAMS ((rtx, enum machine_mode));
  extern int nonmemory_no_elim_operand PARAMS ((rtx, enum machine_mode));
  extern int q_regs_operand PARAMS ((rtx, enum machine_mode));
  extern int non_q_regs_operand PARAMS ((rtx, enum machine_mode));
! extern int ix86_comparison_operator PARAMS ((rtx, enum machine_mode));
  extern int sse_comparison_operator PARAMS ((rtx, enum machine_mode));
  extern int fcmov_comparison_operator PARAMS ((rtx, enum machine_mode));
  extern int cmp_fp_expander_operand PARAMS ((rtx, enum machine_mode));
  extern int ext_register_operand PARAMS ((rtx, enum machine_mode));
  extern int binary_fp_operator PARAMS ((rtx, enum machine_mode));
--- 99,103 ----
*************** extern int ix86_adjust_cost PARAMS ((rtx
*** 125,130 ****
--- 121,128 ----
  extern void ix86_sched_init PARAMS ((FILE *, int));
  extern int ix86_sched_reorder PARAMS ((FILE *, int, rtx *, int, int));
  extern int ix86_variable_issue PARAMS ((FILE *, int, rtx, int));
+ extern enum machine_mode ix86_cc_mode PARAMS ((enum rtx_code, rtx, rtx));
  
  #ifdef TREE_CODE
  extern void init_cumulative_args PARAMS ((CUMULATIVE_ARGS *, tree, rtx));
Index: egcs/gcc/config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.c,v
retrieving revision 1.176
diff -c -3 -p -r1.176 i386.c
*** i386.c	2000/09/08 17:36:33	1.176
--- i386.c	2000/09/14 10:59:55
*************** sse_comparison_operator (op, mode)
*** 1282,1328 ****
    enum rtx_code code = GET_CODE (op);
    return code == EQ || code == LT || code == LE || code == UNORDERED;
  }
! 
! /* Return 1 if OP is a comparison operator that can be issued by fcmov.  */
! 
  int
! fcmov_comparison_operator (op, mode)
!     register rtx op;
!     enum machine_mode mode;
  {
    if (mode != VOIDmode && GET_MODE (op) != mode)
      return 0;
- 
    switch (GET_CODE (op))
      {
      case EQ: case NE:
-     case LEU: case LTU: case GEU: case GTU:
-     case UNORDERED: case ORDERED:
        return 1;
! 
      default:
        return 0;
      }
  }
  
! /* Return 1 if OP is any normal comparison operator plus {UN}ORDERED.  */
  
! int 
! uno_comparison_operator (op, mode)
      register rtx op;
      enum machine_mode mode;
  {
    if (mode != VOIDmode && GET_MODE (op) != mode)
      return 0;
- 
    switch (GET_CODE (op))
      {
      case EQ: case NE:
-     case LE: case LT: case GE: case GT:
-     case LEU: case LTU: case GEU: case GTU:
-     case UNORDERED: case ORDERED:
        return 1;
! 
      default:
        return 0;
      }
--- 1264,1321 ----
    enum rtx_code code = GET_CODE (op);
    return code == EQ || code == LT || code == LE || code == UNORDERED;
  }
! /* Return 1 if OP is a valid comparison operator in valid mode.  */
  int
! ix86_comparison_operator (op, mode)
!      register rtx op;
!      enum machine_mode mode;
  {
+   enum machine_mode inmode;
    if (mode != VOIDmode && GET_MODE (op) != mode)
      return 0;
    switch (GET_CODE (op))
      {
      case EQ: case NE:
        return 1;
!     case LT: case GE:
!       inmode = GET_MODE (XEXP (op, 0));
!       if (inmode == CCmode || inmode == CCGCmode
! 	  || inmode == CCGOCmode || inmode == CCNOmode)
! 	return 1;
!       return 0;
!     case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
!       inmode = GET_MODE (XEXP (op, 0));
!       if (inmode == CCmode)
! 	return 1;
!       return 0;
!     case GT: case LE:
!       inmode = GET_MODE (XEXP (op, 0));
!       if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
! 	return 1;
!       return 0;
      default:
        return 0;
      }
  }
  
! /* Return 1 if OP is a comparison operator that can be issued by fcmov.  */
  
! int
! fcmov_comparison_operator (op, mode)
      register rtx op;
      enum machine_mode mode;
  {
+   enum machine_mode inmode = GET_MODE (XEXP (op, 0));
    if (mode != VOIDmode && GET_MODE (op) != mode)
      return 0;
    switch (GET_CODE (op))
      {
      case EQ: case NE:
        return 1;
!     case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
!       if (inmode == CCmode)
! 	return 1;
!       return 0;
      default:
        return 0;
      }
*************** put_condition_code (code, mode, reverse,
*** 3091,3130 ****
        suffix = "ne";
        break;
      case GT:
!       if (mode == CCNOmode)
  	abort ();
        suffix = "g";
        break;
      case GTU:
        /* ??? Use "nbe" instead of "a" for fcmov losage on some assemblers.
  	 Those same assemblers have the same but opposite losage on cmov.  */
        suffix = fp ? "nbe" : "a";
        break;
      case LT:
!       if (mode == CCNOmode)
  	suffix = "s";
!       else
  	suffix = "l";
        break;
      case LTU:
        suffix = "b";
        break;
      case GE:
!       if (mode == CCNOmode)
  	suffix = "ns";
!       else
  	suffix = "ge";
        break;
      case GEU:
        /* ??? As above.  */
        suffix = fp ? "nb" : "ae";
        break;
      case LE:
!       if (mode == CCNOmode)
  	abort ();
        suffix = "le";
        break;
      case LEU:
        suffix = "be";
        break;
      case UNORDERED:
--- 3038,3089 ----
        suffix = "ne";
        break;
      case GT:
!       if (mode != CCmode && mode != CCNOmode && mode != CCGCmode)
  	abort ();
        suffix = "g";
        break;
      case GTU:
        /* ??? Use "nbe" instead of "a" for fcmov losage on some assemblers.
  	 Those same assemblers have the same but opposite losage on cmov.  */
+       if (mode != CCmode)
+ 	abort();
        suffix = fp ? "nbe" : "a";
        break;
      case LT:
!       if (mode == CCNOmode || mode == CCGOCmode)
  	suffix = "s";
!       else if (mode == CCmode || mode == CCGCmode)
  	suffix = "l";
+       else
+ 	abort();
        break;
      case LTU:
+       if (mode != CCmode)
+ 	abort();
        suffix = "b";
        break;
      case GE:
!       if (mode == CCNOmode || mode == CCGOCmode)
  	suffix = "ns";
!       else if (mode == CCmode || mode == CCGCmode)
  	suffix = "ge";
+       else
+ 	abort();
        break;
      case GEU:
        /* ??? As above.  */
+       if (mode != CCmode)
+ 	abort();
        suffix = fp ? "nb" : "ae";
        break;
      case LE:
!       if (mode != CCmode && mode != CCGCmode && mode != CCNOmode)
  	abort ();
        suffix = "le";
        break;
      case LEU:
+       if (mode != CCmode)
+ 	abort ();
        suffix = "be";
        break;
      case UNORDERED:
*************** ix86_match_ccmode (insn, req_mode)
*** 4510,4524 ****
      set = XVECEXP (set, 0, 0);
    if (GET_CODE (set) != SET)
      abort ();
  
    set_mode = GET_MODE (SET_DEST (set));
    switch (set_mode)
      {
      case CCmode:
!       if (req_mode == CCNOmode)
  	return 0;
        /* FALLTHRU */
!     case CCNOmode:
        if (req_mode == CCZmode)
  	return 0;
        /* FALLTHRU */
--- 4470,4496 ----
      set = XVECEXP (set, 0, 0);
    if (GET_CODE (set) != SET)
      abort ();
+   if (GET_CODE (SET_SRC (set)) != COMPARE)
+     abort ();
  
    set_mode = GET_MODE (SET_DEST (set));
    switch (set_mode)
      {
+     case CCNOmode:
+       if (req_mode != CCNOmode
+ 	  && (req_mode != CCmode
+ 	      || XEXP (SET_SRC (set), 1) != const0_rtx))
+ 	return 0;
+       break;
      case CCmode:
!       if (req_mode == CCGCmode)
  	return 0;
        /* FALLTHRU */
!     case CCGCmode:
!       if (req_mode == CCGOCmode || req_mode == CCNOmode)
! 	return 0;
!       /* FALLTHRU */
!     case CCGOCmode:
        if (req_mode == CCZmode)
  	return 0;
        /* FALLTHRU */
*************** ix86_fp_compare_mode (code)
*** 4628,4633 ****
--- 4600,4648 ----
    return unordered ? CCFPUmode : CCFPmode;
  }
  
+ enum machine_mode
+ ix86_cc_mode (code, op0, op1)
+      enum rtx_code code;
+      rtx op0, op1;
+ {
+   if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
+     return ix86_fp_compare_mode (code);
+   switch (code)
+     {
+       /* Only zero flag is needed.  */
+     case EQ:			/* ZF=0 */
+     case NE:			/* ZF!=0 */
+       return CCZmode;
+       /* Codes needing carry flag.  */
+     case GEU:			/* CF=0 */
+     case GTU:			/* CF=0 & ZF=0 */
+     case LTU:			/* CF=1 */
+     case LEU:			/* CF=1 | ZF=1 */
+       return CCmode;
+       /* Codes possibly doable only with sign flag when
+          comparing against zero.  */
+     case GE:			/* SF=OF   or   SF=0 */
+     case LT:			/* SF<>OF  or   SF=0 */
+       if (op1 == const0_rtx)
+ 	return CCGOCmode;
+       else
+ 	/* For other cases Carry flag is not required.  */
+ 	return CCGCmode;
+       /* Codes doable only with sign flag when comparing
+          against zero, but we miss jump instruction for it
+          so we need to use relational tests agains overflow
+          that thus needs to be zero.  */
+     case GT:			/* ZF=0 & SF=OF */
+     case LE:			/* ZF=1 | SF<>OF */
+       if (op1 == const0_rtx)
+ 	return CCNOmode;
+       else
+ 	return CCGCmode;
+     default:
+       abort();
+     }
+ }
+ 
  /* Return true if we should use an FCOMI instruction for this fp comparison.  */
  
  int
*************** ix86_expand_fp_compare (code, op0, op1, 
*** 4872,4877 ****
--- 4887,4893 ----
  	      emit_insn (gen_andqi_ext_0 (scratch, scratch, GEN_INT (0x45)));
  	      emit_insn (gen_addqi_ext_1 (scratch, scratch, constm1_rtx));
  	      emit_insn (gen_cmpqi_ext_3 (scratch, GEN_INT (0x44)));
+ 	      intcmp_mode = CCmode;
  	      code = GEU;
  	      break;
  	    case UNLE:
*************** ix86_expand_strlensi_unroll_1 (out, alig
*** 5921,5928 ****
    rtx align_4_label = gen_label_rtx ();
    rtx end_0_label = gen_label_rtx ();
    rtx mem;
-   rtx no_flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
-   rtx z_flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
    rtx tmpreg = gen_reg_rtx (SImode);
  
    align = 0;
--- 5933,5938 ----
*************** ix86_expand_strlensi_unroll_1 (out, alig
*** 5944,5973 ****
  	  align_rtx = expand_binop (SImode, and_optab, scratch, GEN_INT (3),
  				    NULL_RTX, 0, OPTAB_WIDEN);
  
! 	  emit_insn (gen_cmpsi_ccz_1 (align_rtx, const0_rtx));
! 
! 	  tmp = gen_rtx_EQ (VOIDmode, z_flags, const0_rtx);
! 	  tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, 
! 				      gen_rtx_LABEL_REF (VOIDmode,
! 							 align_4_label),
! 				      pc_rtx);
! 	  emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
! 
! 	  emit_insn (gen_cmpsi_ccno_1 (align_rtx, GEN_INT (2)));
! 
! 	  tmp = gen_rtx_EQ (VOIDmode, no_flags, const0_rtx);
! 	  tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, 
! 				      gen_rtx_LABEL_REF (VOIDmode,
! 							 align_2_label),
! 				      pc_rtx);
! 	  emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
! 
! 	  tmp = gen_rtx_GTU (VOIDmode, no_flags, const0_rtx);
! 	  tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, 
! 				      gen_rtx_LABEL_REF (VOIDmode,
! 							 align_3_label),
! 				      pc_rtx);
! 	  emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
  	}
        else
          {
--- 5954,5965 ----
  	  align_rtx = expand_binop (SImode, and_optab, scratch, GEN_INT (3),
  				    NULL_RTX, 0, OPTAB_WIDEN);
  
! 	  emit_cmp_and_jump_insns (align_rtx, const0_rtx, EQ, NULL,
! 			  	   SImode, 1, 0, align_4_label);
! 	  emit_cmp_and_jump_insns (align_rtx, GEN_INT (2), EQ, NULL,
! 				   SImode, 1, 0, align_2_label);
! 	  emit_cmp_and_jump_insns (align_rtx, GEN_INT (2), GTU, NULL,
! 				   SImode, 1, 0, align_3_label);
  	}
        else
          {
*************** ix86_expand_strlensi_unroll_1 (out, alig
*** 5976,5990 ****
  
  	  align_rtx = expand_binop (SImode, and_optab, scratch, GEN_INT (2),
  				    NULL_RTX, 0, OPTAB_WIDEN);
- 
- 	  emit_insn (gen_cmpsi_ccz_1 (align_rtx, const0_rtx));
  
! 	  tmp = gen_rtx_EQ (VOIDmode, z_flags, const0_rtx);
! 	  tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, 
! 				      gen_rtx_LABEL_REF (VOIDmode,
! 							 align_4_label),
! 				      pc_rtx);
! 	  emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
          }
  
        mem = gen_rtx_MEM (QImode, out);
--- 5968,5976 ----
  
  	  align_rtx = expand_binop (SImode, and_optab, scratch, GEN_INT (2),
  				    NULL_RTX, 0, OPTAB_WIDEN);
  
! 	  emit_cmp_and_jump_insns (align_rtx, const0_rtx, EQ, NULL,
! 				   SImode, 1, 0, align_4_label);
          }
  
        mem = gen_rtx_MEM (QImode, out);
*************** ix86_expand_strlensi_unroll_1 (out, alig
*** 5992,6005 ****
        /* Now compare the bytes.  */
  
        /* Compare the first n unaligned byte on a byte per byte basis. */
!       emit_insn (gen_cmpqi_ccz_1 (mem, const0_rtx));
  
-       tmp = gen_rtx_EQ (VOIDmode, z_flags, const0_rtx);
-       tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, 
- 				  gen_rtx_LABEL_REF (VOIDmode, end_0_label),
- 				  pc_rtx);
-       emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
- 
        /* Increment the address. */
        emit_insn (gen_addsi3 (out, out, const1_rtx));
  
--- 5978,5986 ----
        /* Now compare the bytes.  */
  
        /* Compare the first n unaligned byte on a byte per byte basis. */
!       emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL,
! 			       QImode, 1, 0, end_0_label);
  
        /* Increment the address. */
        emit_insn (gen_addsi3 (out, out, const1_rtx));
  
*************** ix86_expand_strlensi_unroll_1 (out, alig
*** 6007,6034 ****
        if (align != 2)
  	{
  	  emit_label (align_2_label);
- 
- 	  emit_insn (gen_cmpqi_ccz_1 (mem, const0_rtx));
  
! 	  tmp = gen_rtx_EQ (VOIDmode, z_flags, const0_rtx);
! 	  tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, 
! 				      gen_rtx_LABEL_REF (VOIDmode,
! 							 end_0_label),
! 				      pc_rtx);
! 	  emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
  
  	  emit_insn (gen_addsi3 (out, out, const1_rtx));
  
  	  emit_label (align_3_label);
  	}
  
!       emit_insn (gen_cmpqi_ccz_1 (mem, const0_rtx));
! 
!       tmp = gen_rtx_EQ (VOIDmode, z_flags, const0_rtx);
!       tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, 
! 				  gen_rtx_LABEL_REF (VOIDmode, end_0_label),
! 				  pc_rtx);
!       emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
  
        emit_insn (gen_addsi3 (out, out, const1_rtx));
      }
--- 5988,6004 ----
        if (align != 2)
  	{
  	  emit_label (align_2_label);
  
! 	  emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL,
! 				   QImode, 1, 0, end_0_label);
  
  	  emit_insn (gen_addsi3 (out, out, const1_rtx));
  
  	  emit_label (align_3_label);
  	}
  
!       emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL,
! 			       QImode, 1, 0, end_0_label);
  
        emit_insn (gen_addsi3 (out, out, const1_rtx));
      }
*************** ix86_expand_strlensi_unroll_1 (out, alig
*** 6049,6055 ****
    emit_insn (gen_one_cmplsi2 (scratch, scratch));
    emit_insn (gen_andsi3 (tmpreg, tmpreg, scratch));
    emit_insn (gen_andsi3 (tmpreg, tmpreg, GEN_INT (0x80808080)));
!   emit_cmp_and_jump_insns (tmpreg, const0_rtx, EQ, 0, SImode, 1, 0, align_4_label);
  
    if (TARGET_CMOVE)
      {
--- 6019,6026 ----
    emit_insn (gen_one_cmplsi2 (scratch, scratch));
    emit_insn (gen_andsi3 (tmpreg, tmpreg, scratch));
    emit_insn (gen_andsi3 (tmpreg, tmpreg, GEN_INT (0x80808080)));
!   emit_cmp_and_jump_insns (tmpreg, const0_rtx, EQ, 0,
! 			   SImode, 1, 0, align_4_label);
  
    if (TARGET_CMOVE)
      {
Index: egcs/gcc/config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.h,v
retrieving revision 1.128
diff -c -3 -p -r1.128 i386.h
*** i386.h	2000/09/08 17:36:33	1.128
--- i386.h	2000/09/14 10:59:56
*************** while (0)
*** 2257,2270 ****
  
     For the i386, we need separate modes when floating-point
     equality comparisons are being done. 
! 
!    Add CCNO to indicate No Overflow, which is often also includes
!    No Carry.  This is typically used on the output of logicals,
!    and is only valid in comparisons against zero.
  
     Add CCZ to indicate that only the Zero flag is valid.  */
  
  #define EXTRA_CC_MODES \
  	CC(CCNOmode, "CCNO") \
  	CC(CCZmode, "CCZ") \
  	CC(CCFPmode, "CCFP") \
--- 2253,2277 ----
  
     For the i386, we need separate modes when floating-point
     equality comparisons are being done. 
!    
!    Add CCNO to indicate comparisons against zero that requires
!    No Overflow.  Sign bit test is used instead and thus
!    can be used to form "a&b>0" type of tests.
! 
!    Add CCGC to indicate comparisons agains zero that allows
!    unspecified garbage in the Carry flag.  This mode is used
!    by inc/dec instructions.
! 
!    Add CCGCO to indicate comparisons agains zero that allows
!    unspecified garbage in the Carry and Overflow flag. This
!    mode is used to simulate comparisons of (a-b) and (a+b)
!    against zero using sub/cmp/add operations.
  
     Add CCZ to indicate that only the Zero flag is valid.  */
  
  #define EXTRA_CC_MODES \
+ 	CC(CCGCmode, "CCGC") \
+ 	CC(CCGOCmode, "CCGOC") \
  	CC(CCNOmode, "CCNO") \
  	CC(CCZmode, "CCZ") \
  	CC(CCFPmode, "CCFP") \
*************** while (0)
*** 2279,2290 ****
     For integer comparisons against zero, reduce to CCNOmode or CCZmode if
     possible, to allow for more combinations.  */
  
! #define SELECT_CC_MODE(OP,X,Y)				\
!   (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT		\
!    ? (OP) == EQ || (OP) == NE ? CCFPUmode : CCFPmode	\
!    : (OP) == LE || (OP) == GT ? CCmode			\
!    : (Y) != const0_rtx ? CCmode				\
!    : (OP) == EQ || (OP) == NE ? CCZmode : CCNOmode)
  
  /* Control the assembler format that we output, to the extent
     this does not vary between assemblers.  */
--- 2286,2292 ----
     For integer comparisons against zero, reduce to CCNOmode or CCZmode if
     possible, to allow for more combinations.  */
  
! #define SELECT_CC_MODE(OP,X,Y) ix86_cc_mode (OP, X, Y)
  
  /* Control the assembler format that we output, to the extent
     this does not vary between assemblers.  */
Index: egcs/gcc/config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.179
diff -c -3 -p -r1.179 i386.md
*** i386.md	2000/09/12 14:58:46	1.179
--- i386.md	2000/09/14 10:59:59
***************
*** 1061,1071 ****
    DONE;
  }")
  
! (define_insn "cmpsi_ccz_1"
!   [(set (reg:CCZ 17)
! 	(compare:CCZ (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
! 		     (match_operand:SI 1 "const0_operand" "n,n")))]
!   ""
    "@
     test{l}\\t{%0, %0|%0, %0}
     cmp{l}\\t{%1, %0|%0, %1}"
--- 1043,1053 ----
    DONE;
  }")
  
! (define_insn "*cmpsi_ccno_1"
!   [(set (reg 17)
! 	(compare (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
! 		 (match_operand:SI 1 "const0_operand" "n,n")))]
!   "ix86_match_ccmode (insn, CCNOmode)"
    "@
     test{l}\\t{%0, %0|%0, %0}
     cmp{l}\\t{%1, %0|%0, %1}"
***************
*** 1073,1100 ****
     (set_attr "length_immediate" "0,1")
     (set_attr "mode" "SI")])
  
! (define_insn "cmpsi_ccno_1"
!   [(set (reg:CCNO 17)
! 	(compare:CCNO (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
! 		      (match_operand:SI 1 "const0_operand" "n,n")))]
!   ""
!   "@
!    test{l}\\t{%0, %0|%0, %0}
!    cmp{l}\\t{%1, %0|%0, %1}"
!   [(set_attr "type" "test,icmp")
!    (set_attr "length_immediate" "0,1")
     (set_attr "mode" "SI")])
  
! (define_insn "cmpsi_1"
    [(set (reg:CC 17)
  	(compare:CC (match_operand:SI 0 "nonimmediate_operand" "rm,r")
  		    (match_operand:SI 1 "general_operand" "ri,mr")))]
!   "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
    "cmp{l}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "SI")])
  
! (define_insn "*cmphi_0"
    [(set (reg 17)
  	(compare (match_operand:HI 0 "nonimmediate_operand" "r,?mr")
  		 (match_operand:HI 1 "const0_operand" "n,n")))]
--- 1055,1088 ----
     (set_attr "length_immediate" "0,1")
     (set_attr "mode" "SI")])
  
! (define_insn "*cmpsi_minus_1"
!   [(set (reg 17)
! 	(compare (minus:SI (match_operand:SI 0 "nonimmediate_operand" "rm,r")
! 			   (match_operand:SI 1 "general_operand" "ri,mr"))
! 		 (const_int 0)))]
!   "ix86_match_ccmode (insn, CCGOCmode)"
!   "cmp{l}\\t{%1, %0|%0, %1}"
!   [(set_attr "type" "icmp")
     (set_attr "mode" "SI")])
  
! (define_expand "cmpsi_1"
    [(set (reg:CC 17)
  	(compare:CC (match_operand:SI 0 "nonimmediate_operand" "rm,r")
  		    (match_operand:SI 1 "general_operand" "ri,mr")))]
!   ""
!   "")
! 
! (define_insn "*cmpsi_1_insn"
!   [(set (reg 17)
! 	(compare (match_operand:SI 0 "nonimmediate_operand" "rm,r")
! 		 (match_operand:SI 1 "general_operand" "ri,mr")))]
!   "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
!     && ix86_match_ccmode (insn, CCmode)"
    "cmp{l}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "SI")])
  
! (define_insn "*cmphi_ccno_1"
    [(set (reg 17)
  	(compare (match_operand:HI 0 "nonimmediate_operand" "r,?mr")
  		 (match_operand:HI 1 "const0_operand" "n,n")))]
***************
*** 1106,1137 ****
     (set_attr "length_immediate" "0,1")
     (set_attr "mode" "HI")])
  
! (define_insn "*cmphi_1"
!   [(set (reg:CC 17)
! 	(compare:CC (match_operand:HI 0 "nonimmediate_operand" "rm,r")
! 		    (match_operand:HI 1 "general_operand" "ri,mr")))]
!   "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
    "cmp{w}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "HI")])
  
! (define_insn "cmpqi_ccz_1"
!   [(set (reg:CCZ 17)
! 	(compare:CCZ (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
! 		     (match_operand:QI 1 "const0_operand" "n,n")))]
!   ""
!   "@
!    test{b}\\t{%0, %0|%0, %0}
!    cmp{b}\\t{$0, %0|%0, 0}"
!   [(set_attr "type" "test,icmp")
!    (set_attr "length_immediate" "0,1")
!    (set_attr "mode" "QI")])
  
  (define_insn "*cmpqi_ccno_1"
!   [(set (reg:CCNO 17)
! 	(compare:CCNO (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
! 		      (match_operand:QI 1 "const0_operand" "n,n")))]
!   ""
    "@
     test{b}\\t{%0, %0|%0, %0}
     cmp{b}\\t{$0, %0|%0, 0}"
--- 1094,1124 ----
     (set_attr "length_immediate" "0,1")
     (set_attr "mode" "HI")])
  
! (define_insn "*cmphi_minus_1"
!   [(set (reg 17)
! 	(compare (minus:HI (match_operand:HI 0 "nonimmediate_operand" "rm,r")
! 			   (match_operand:HI 1 "general_operand" "ri,mr"))
! 		 (const_int 0)))]
!   "ix86_match_ccmode (insn, CCGOCmode)"
    "cmp{w}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "HI")])
  
! (define_insn "*cmphi_1"
!   [(set (reg 17)
! 	(compare (match_operand:HI 0 "nonimmediate_operand" "rm,r")
! 		 (match_operand:HI 1 "general_operand" "ri,mr")))]
!   "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
!    && ix86_match_ccmode (insn, CCmode)"
!   "cmp{w}\\t{%1, %0|%0, %1}"
!   [(set_attr "type" "icmp")
!    (set_attr "mode" "HI")])
  
  (define_insn "*cmpqi_ccno_1"
!   [(set (reg 17)
! 	(compare (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
! 		 (match_operand:QI 1 "const0_operand" "n,n")))]
!   "ix86_match_ccmode (insn, CCNOmode)"
    "@
     test{b}\\t{%0, %0|%0, %0}
     cmp{b}\\t{$0, %0|%0, 0}"
***************
*** 1140,1163 ****
     (set_attr "mode" "QI")])
  
  (define_insn "*cmpqi_1"
!   [(set (reg:CC 17)
! 	(compare:CC (match_operand:QI 0 "nonimmediate_operand" "qm,q")
! 		    (match_operand:QI 1 "general_operand" "qi,mq")))]
!   "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
    "cmp{b}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
  
  (define_insn "*cmpqi_ext_1"
!   [(set (reg:CC 17)
! 	(compare:CC
  	  (match_operand:QI 0 "general_operand" "qm")
  	  (subreg:QI
  	    (zero_extract:SI
  	      (match_operand 1 "ext_register_operand" "q")
  	      (const_int 8)
  	      (const_int 8)) 0)))]
!   ""
    "cmp{b}\\t{%h1, %0|%0, %h1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
--- 1127,1161 ----
     (set_attr "mode" "QI")])
  
  (define_insn "*cmpqi_1"
!   [(set (reg 17)
! 	(compare (match_operand:QI 0 "nonimmediate_operand" "qm,q")
! 		 (match_operand:QI 1 "general_operand" "qi,mq")))]
!   "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
!     && ix86_match_ccmode (insn, CCmode)"
    "cmp{b}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
  
+ (define_insn "*cmpqi_minus_1"
+   [(set (reg 17)
+ 	(compare (minus:QI (match_operand:QI 0 "nonimmediate_operand" "rm,r")
+ 			   (match_operand:QI 1 "general_operand" "ri,mr"))
+ 		 (const_int 0)))]
+   "ix86_match_ccmode (insn, CCGOCmode)"
+   "cmp{w}\\t{%1, %0|%0, %1}"
+   [(set_attr "type" "icmp")
+    (set_attr "mode" "QI")])
+ 
  (define_insn "*cmpqi_ext_1"
!   [(set (reg 17)
! 	(compare
  	  (match_operand:QI 0 "general_operand" "qm")
  	  (subreg:QI
  	    (zero_extract:SI
  	      (match_operand 1 "ext_register_operand" "q")
  	      (const_int 8)
  	      (const_int 8)) 0)))]
!   "ix86_match_ccmode (insn, CCmode)"
    "cmp{b}\\t{%h1, %0|%0, %h1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
***************
*** 1177,1183 ****
     (set_attr "length_immediate" "0")
     (set_attr "mode" "QI")])
  
! (define_insn "cmpqi_ext_3"
    [(set (reg:CC 17)
  	(compare:CC
  	  (subreg:QI
--- 1175,1181 ----
     (set_attr "length_immediate" "0")
     (set_attr "mode" "QI")])
  
! (define_expand "cmpqi_ext_3"
    [(set (reg:CC 17)
  	(compare:CC
  	  (subreg:QI
***************
*** 1187,1199 ****
  	      (const_int 8)) 0)
  	  (match_operand:QI 1 "general_operand" "qmn")))]
    ""
    "cmp{b}\\t{%1, %h0|%h0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
  
  (define_insn "*cmpqi_ext_4"
!   [(set (reg:CC 17)
! 	(compare:CC
  	  (subreg:QI
  	    (zero_extract:SI
  	      (match_operand 0 "ext_register_operand" "q")
--- 1185,1209 ----
  	      (const_int 8)) 0)
  	  (match_operand:QI 1 "general_operand" "qmn")))]
    ""
+   "")
+ 
+ (define_insn "cmpqi_ext_3_insn"
+   [(set (reg 17)
+ 	(compare
+ 	  (subreg:QI
+ 	    (zero_extract:SI
+ 	      (match_operand 0 "ext_register_operand" "q")
+ 	      (const_int 8)
+ 	      (const_int 8)) 0)
+ 	  (match_operand:QI 1 "general_operand" "qmn")))]
+   "ix86_match_ccmode (insn, CCmode)"
    "cmp{b}\\t{%1, %h0|%h0, %1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
  
  (define_insn "*cmpqi_ext_4"
!   [(set (reg 17)
! 	(compare
  	  (subreg:QI
  	    (zero_extract:SI
  	      (match_operand 0 "ext_register_operand" "q")
***************
*** 1204,1210 ****
  	      (match_operand 1 "ext_register_operand" "q")
  	      (const_int 8)
  	      (const_int 8)) 0)))]
!   ""
    "cmp{b}\\t{%h1, %h0|%h0, %h1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
--- 1214,1220 ----
  	      (match_operand 1 "ext_register_operand" "q")
  	      (const_int 8)
  	      (const_int 8)) 0)))]
!   "ix86_match_ccmode (insn, CCmode)"
    "cmp{b}\\t{%h1, %h0|%h0, %h1}"
    [(set_attr "type" "icmp")
     (set_attr "mode" "QI")])
***************
*** 3955,3961 ****
  	  (const_int 0)))			
     (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
  	(plus:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (PLUS, SImode, operands)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
--- 3953,3959 ----
  	  (const_int 0)))			
     (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
  	(plus:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (PLUS, SImode, operands)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
***************
*** 4001,4007 ****
  	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
  		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:SI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
--- 3999,4005 ----
  	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
  		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:SI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCGCmode)
     && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
***************
*** 4043,4054 ****
     (set_attr "mode" "SI")])
  
  (define_insn "*addsi_4"
!   [(set (reg:CC 17)
! 	(compare:CC (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))
! 		    (match_operand:SI 1 "nonimmediate_operand" "%0,0")))
     (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (PLUS, SImode, operands)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
     && ! pic_symbolic_operand (operands[2], VOIDmode)"
--- 4041,4053 ----
     (set_attr "mode" "SI")])
  
  (define_insn "*addsi_4"
!   [(set (reg 17)
! 	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))
! 		 (match_operand:SI 1 "nonimmediate_operand" "%0,0")))
     (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
  	(plus:SI (match_dup 1) (match_dup 2)))]
    "ix86_binary_operator_ok (PLUS, SImode, operands)
+    && ix86_match_ccmode (insn, CCmode)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
     && ! pic_symbolic_operand (operands[2], VOIDmode)"
***************
*** 4057,4067 ****
     (set_attr "mode" "SI")])
  
  (define_insn "*addsi_5"
!   [(set (reg:CC 17)
! 	(compare:CC (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
! 		    (match_operand:SI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:SI 0 "=r"))]
    "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
     && ! pic_symbolic_operand (operands[2], VOIDmode)"
--- 4056,4067 ----
     (set_attr "mode" "SI")])
  
  (define_insn "*addsi_5"
!   [(set (reg 17)
! 	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
! 		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:SI 0 "=r"))]
    "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
+    && ix86_match_ccmode (insn, CCmode)
     /* Current assemblers are broken and do not allow @GOTOFF in
        ought but a memory context. */
     && ! pic_symbolic_operand (operands[2], VOIDmode)"
***************
*** 4069,4074 ****
--- 4069,4122 ----
    [(set_attr "type" "alu")
     (set_attr "mode" "SI")])
  
+ (define_insn "*addsi_6"
+   [(set (reg 17)
+ 	(compare
+ 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+ 		   (match_operand:SI 2 "general_operand" "rmni"))
+ 	  (const_int 0)))			
+    (clobber (match_scratch:SI 0 "=r"))]
+   "ix86_match_ccmode (insn, CCGOCmode)
+    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
+    /* Current assemblers are broken and do not allow @GOTOFF in
+       ought but a memory context. */
+    && ! pic_symbolic_operand (operands[2], VOIDmode)"
+   "*
+ {
+   switch (get_attr_type (insn))
+     {
+     case TYPE_INCDEC:
+       if (! rtx_equal_p (operands[0], operands[1]))
+ 	abort ();
+       if (operands[2] == const1_rtx)
+         return \"inc{l}\\t%0\";
+       else if (operands[2] == constm1_rtx)
+         return \"dec{l}\\t%0\";
+       else
+ 	abort();
+ 
+     default:
+       if (! rtx_equal_p (operands[0], operands[1]))
+ 	abort ();
+       /* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
+ 	 Exceptions: -128 encodes smaller than 128, so swap sign and op.  */
+       if (GET_CODE (operands[2]) == CONST_INT
+           && (INTVAL (operands[2]) == 128
+ 	      || (INTVAL (operands[2]) < 0
+ 		  && INTVAL (operands[2]) != -128)))
+         {
+           operands[2] = GEN_INT (-INTVAL (operands[2]));
+           return \"sub{l}\\t{%2, %0|%0, %2}\";
+         }
+       return \"add{l}\\t{%2, %0|%0, %2}\";
+     }
+ }"
+   [(set (attr "type")
+      (if_then_else (match_operand:SI 2 "incdec_operand" "")
+ 	(const_string "incdec")
+ 	(const_string "alu")))
+    (set_attr "mode" "SI")])
+ 
  (define_expand "addhi3"
    [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
  		   (plus:HI (match_operand:HI 1 "nonimmediate_operand" "")
***************
*** 4173,4179 ****
  	  (const_int 0)))			
     (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
  	(plus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (PLUS, HImode, operands)"
    "*
  {
--- 4221,4227 ----
  	  (const_int 0)))			
     (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
  	(plus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (PLUS, HImode, operands)"
    "*
  {
***************
*** 4213,4219 ****
  	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
  		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:HI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "*
  {
--- 4261,4267 ----
  	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
  		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:HI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCGCmode)
     && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "*
  {
***************
*** 4249,4274 ****
     (set_attr "mode" "HI")])
  
  (define_insn "*addhi_4"
!   [(set (reg:CC 17)
! 	(compare:CC (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))
! 		    (match_operand:HI 1 "nonimmediate_operand" "%0,0")))
     (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
  	(plus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_binary_operator_ok (PLUS, HImode, operands)"
    "add{w}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "HI")])
  
  (define_insn "*addhi_5"
!   [(set (reg:CC 17)
! 	(compare:CC (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
! 		    (match_operand:HI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:HI 0 "=r"))]
!   "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "add{w}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "HI")])
  
  (define_expand "addqi3"
    [(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "")
  		   (plus:QI (match_operand:QI 1 "nonimmediate_operand" "")
--- 4297,4366 ----
     (set_attr "mode" "HI")])
  
  (define_insn "*addhi_4"
!   [(set (reg 17)
! 	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))
! 		 (match_operand:HI 1 "nonimmediate_operand" "%0,0")))
     (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
  	(plus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCmode)
!    && ix86_binary_operator_ok (PLUS, HImode, operands)"
    "add{w}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "HI")])
  
  (define_insn "*addhi_5"
!   [(set (reg 17)
! 	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
! 		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:HI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCmode)
!    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "add{w}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "HI")])
  
+ (define_insn "*addhi_6"
+   [(set (reg 17)
+ 	(compare
+ 	  (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0")
+ 		   (match_operand:HI 2 "general_operand" "rmni"))
+ 	  (const_int 0)))			
+    (clobber (match_scratch:HI 0 "=r"))]
+   "ix86_match_ccmode (insn, CCGOCmode)
+    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
+   "*
+ {
+   switch (get_attr_type (insn))
+     {
+     case TYPE_INCDEC:
+       if (operands[2] == const1_rtx)
+ 	return \"inc{w}\\t%0\";
+       else if (operands[2] == constm1_rtx
+ 	       || (GET_CODE (operands[2]) == CONST_INT
+ 		   && INTVAL (operands[2]) == 65535))
+ 	return \"dec{w}\\t%0\";
+       abort();
+ 
+     default:
+       /* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
+ 	 Exceptions: -128 encodes smaller than 128, so swap sign and op.  */
+       if (GET_CODE (operands[2]) == CONST_INT
+           && (INTVAL (operands[2]) == 128
+ 	      || (INTVAL (operands[2]) < 0
+ 		  && INTVAL (operands[2]) != -128)))
+ 	{
+ 	  operands[2] = GEN_INT (-INTVAL (operands[2]));
+ 	  return \"sub{w}\\t{%2, %0|%0, %2}\";
+ 	}
+       return \"add{w}\\t{%2, %0|%0, %2}\";
+     }
+ }"
+   [(set (attr "type")
+      (if_then_else (match_operand:HI 2 "incdec_operand" "")
+ 	(const_string "incdec")
+ 	(const_string "alu")))
+    (set_attr "mode" "HI")])
+ 
  (define_expand "addqi3"
    [(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "")
  		   (plus:QI (match_operand:QI 1 "nonimmediate_operand" "")
***************
*** 4384,4390 ****
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
  	(plus:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (PLUS, QImode, operands)"
    "*
  {
--- 4476,4482 ----
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
  	(plus:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (PLUS, QImode, operands)"
    "*
  {
***************
*** 4421,4427 ****
  	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
  		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:QI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "*
  {
--- 4513,4519 ----
  	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
  		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:QI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCGCmode)
     && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "*
  {
***************
*** 4454,4479 ****
     (set_attr "mode" "QI")])
  
  (define_insn "*addqi_4"
!   [(set (reg:CC 17)
! 	(compare:CC (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))
! 		    (match_operand:QI 1 "nonimmediate_operand" "%0,0")))
     (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
  	(plus:QI (match_dup 1) (match_dup 2)))]
!   "ix86_binary_operator_ok (PLUS, QImode, operands)"
    "add{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
  (define_insn "*addqi_5"
!   [(set (reg:CC 17)
! 	(compare:CC (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
! 		    (match_operand:QI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:QI 0 "=r"))]
!   "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "add{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
  
  (define_insn "addqi_ext_1"
    [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "=q")
--- 4546,4612 ----
     (set_attr "mode" "QI")])
  
  (define_insn "*addqi_4"
!   [(set (reg 17)
! 	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))
! 		 (match_operand:QI 1 "nonimmediate_operand" "%0,0")))
     (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
  	(plus:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCmode)
!    && ix86_binary_operator_ok (PLUS, QImode, operands)"
    "add{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
  (define_insn "*addqi_5"
!   [(set (reg 17)
! 	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
! 		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
     (clobber (match_scratch:QI 0 "=r"))]
!   "ix86_match_ccmode (insn, CCmode)
!    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
    "add{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
+ (define_insn "*addqi_6"
+   [(set (reg 17)
+ 	(compare
+ 	  (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
+ 		   (match_operand:QI 2 "general_operand" "qmni"))
+ 	  (const_int 0)))
+    (clobber (match_scratch:QI 0 "=r"))]
+   "ix86_match_ccmode (insn, CCGOCmode)
+    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
+   "*
+ {
+   switch (get_attr_type (insn))
+     {
+     case TYPE_INCDEC:
+       if (operands[2] == const1_rtx)
+ 	return \"inc{b}\\t%0\";
+       else if (operands[2] == constm1_rtx
+ 	       || (GET_CODE (operands[2]) == CONST_INT
+ 		   && INTVAL (operands[2]) == 255))
+ 	return \"dec{b}\\t%0\";
+       abort();
+ 
+     default:
+       /* Make things pretty and `subb $4,%al' rather than `addb $-4, %al'.  */
+       if (GET_CODE (operands[2]) == CONST_INT
+           && INTVAL (operands[2]) < 0)
+ 	{
+ 	  operands[2] = GEN_INT (-INTVAL (operands[2]));
+ 	  return \"sub{b}\\t{%2, %0|%0, %2}\";
+ 	}
+       return \"add{b}\\t{%2, %0|%0, %2}\";
+     }
+ }"
+   [(set (attr "type")
+      (if_then_else (match_operand:QI 2 "incdec_operand" "")
+ 	(const_string "incdec")
+ 	(const_string "alu")))
+    (set_attr "mode" "QI")])
+ 
  
  (define_insn "addqi_ext_1"
    [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "=q")
***************
*** 4631,4637 ****
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
  	(minus:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (MINUS, SImode, operands)"
    "sub{l}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
--- 4764,4770 ----
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
  	(minus:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (MINUS, SImode, operands)"
    "sub{l}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
***************
*** 4675,4681 ****
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
  	(minus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (MINUS, HImode, operands)"
    "sub{w}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
--- 4808,4814 ----
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
  	(minus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (MINUS, HImode, operands)"
    "sub{w}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
***************
*** 4719,4725 ****
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=qm,q")
  	(minus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (MINUS, QImode, operands)"
    "sub{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
--- 4852,4858 ----
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=qm,q")
  	(minus:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (MINUS, QImode, operands)"
    "sub{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "alu")
***************
*** 5175,5205 ****
  ;; On Pentium, "test imm, reg" is pairable only with eax, ax, and al.
  ;; Note that this excludes ah.
  
! (define_insn "*testsi_ccz_1"
!   [(set (reg:CCZ 17)
! 	(compare:CCZ
  	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
  		  (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
  	  (const_int 0)))]
!   ""
    "test{l}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "test")
     (set_attr "modrm" "0,1,1")
     (set_attr "mode" "SI")
     (set_attr "pent_pair" "uv,np,uv")])
  
! (define_insn "testsi_ccno_1"
    [(set (reg:CCNO 17)
  	(compare:CCNO
! 	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
! 		  (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
  	  (const_int 0)))]
    ""
!   "test{l}\\t{%1, %0|%0, %1}"
!   [(set_attr "type" "test")
!    (set_attr "modrm" "0,1,1")
!    (set_attr "mode" "SI")
!    (set_attr "pent_pair" "uv,np,uv")])
  
  (define_insn "*testhi_1"
    [(set (reg 17)
--- 5308,5335 ----
  ;; On Pentium, "test imm, reg" is pairable only with eax, ax, and al.
  ;; Note that this excludes ah.
  
! 
! (define_insn "testsi_1"
!   [(set (reg 17)
! 	(compare
  	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
  		  (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
  	  (const_int 0)))]
!   "ix86_match_ccmode (insn, CCNOmode)"
    "test{l}\\t{%1, %0|%0, %1}"
    [(set_attr "type" "test")
     (set_attr "modrm" "0,1,1")
     (set_attr "mode" "SI")
     (set_attr "pent_pair" "uv,np,uv")])
  
! (define_expand "testsi_ccno_1"
    [(set (reg:CCNO 17)
  	(compare:CCNO
! 	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "")
! 		  (match_operand:SI 1 "nonmemory_operand" ""))
  	  (const_int 0)))]
    ""
!   "")
  
  (define_insn "*testhi_1"
    [(set (reg 17)
***************
*** 5213,5237 ****
     (set_attr "mode" "HI")
     (set_attr "pent_pair" "uv,np,uv")])
  
! (define_insn "testqi_ccz_1"
    [(set (reg:CCZ 17)
!         (compare:CCZ
! 	  (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm")
! 		  (match_operand:QI 1 "nonmemory_operand" "n,n,qn"))
! 	  (const_int 0)))]
    ""
!   "test{b}\\t{%1, %0|%0, %1}"
!   [(set_attr "type" "test")
!    (set_attr "modrm" "0,1,1")
!    (set_attr "mode" "QI")
!    (set_attr "pent_pair" "uv,np,uv")])
  
! (define_insn "*testqi_ccno_1"
!   [(set (reg:CCNO 17)
!         (compare:CCNO (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm,r")
! 			      (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
! 		      (const_int 0)))]
!   ""
    "@
     test{b}\\t{%1, %0|%0, %1} 
     test{b}\\t{%1, %0|%0, %1} 
--- 5343,5362 ----
     (set_attr "mode" "HI")
     (set_attr "pent_pair" "uv,np,uv")])
  
! (define_expand "testqi_ccz_1"
    [(set (reg:CCZ 17)
!         (compare:CCZ (and:QI (match_operand:QI 0 "nonimmediate_operand" "")
! 			     (match_operand:QI 1 "nonmemory_operand" ""))
! 		 (const_int 0)))]
    ""
!   "")
  
! (define_insn "*testqi_1"
!   [(set (reg 17)
!         (compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm,r")
! 			 (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
! 		 (const_int 0)))]
!   "ix86_match_ccmode (insn, CCNOmode)"
    "@
     test{b}\\t{%1, %0|%0, %1} 
     test{b}\\t{%1, %0|%0, %1} 
***************
*** 5242,5267 ****
     (set_attr "mode" "QI,QI,QI,SI")
     (set_attr "pent_pair" "uv,np,uv,np")])
  
! (define_insn "*testqi_ext_ccz_0"
!   [(set (reg:CCZ 17)
! 	(compare:CCZ
  	  (and:SI
  	    (zero_extract:SI
! 	      (match_operand 0 "ext_register_operand" "q")
! 	      (const_int 8)
! 	      (const_int 8))
! 	    (match_operand 1 "const_int_operand" "n"))
! 	  (const_int 0)))]
!   "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff"
!   "test{b}\\t{%1, %h0|%h0, %1}"
!   [(set_attr "type" "test")
!    (set_attr "mode" "QI")
!    (set_attr "length_immediate" "1")
!    (set_attr "pent_pair" "np")])
  
! (define_insn "testqi_ext_ccno_0"
!   [(set (reg:CCNO 17)
! 	(compare:CCNO
  	  (and:SI
  	    (zero_extract:SI
  	      (match_operand 0 "ext_register_operand" "q")
--- 5367,5388 ----
     (set_attr "mode" "QI,QI,QI,SI")
     (set_attr "pent_pair" "uv,np,uv,np")])
  
! (define_expand "testqi_ext_ccno_0"
!   [(set (reg:CCNO 17)
! 	(compare:CCNO
  	  (and:SI
  	    (zero_extract:SI
! 	      (match_operand 0 "ext_register_operand" "")
! 	      (const_int 8)
! 	      (const_int 8))
! 	    (match_operand 1 "const_int_operand" ""))
! 	  (const_int 0)))]
!   ""
!   "")
  
! (define_insn "*testqi_ext_0"
!   [(set (reg 17)
! 	(compare
  	  (and:SI
  	    (zero_extract:SI
  	      (match_operand 0 "ext_register_operand" "q")
***************
*** 5269,5275 ****
  	      (const_int 8))
  	    (match_operand 1 "const_int_operand" "n"))
  	  (const_int 0)))]
!   "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff"
    "test{b}\\t{%1, %h0|%h0, %1}"
    [(set_attr "type" "test")
     (set_attr "mode" "QI")
--- 5390,5397 ----
  	      (const_int 8))
  	    (match_operand 1 "const_int_operand" "n"))
  	  (const_int 0)))]
!   "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff
!    && ix86_match_ccmode (insn, CCNOmode)"
    "test{b}\\t{%1, %h0|%h0, %1}"
    [(set_attr "type" "test")
     (set_attr "mode" "QI")
***************
*** 5941,5949 ****
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
! (define_insn "xorqi_cc_ext_1"
!   [(set (reg:CCNO 17)
! 	(compare:CCNO
  	  (xor:SI
  	    (zero_extract:SI
  	      (match_operand 1 "ext_register_operand" "0")
--- 6016,6024 ----
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
! (define_insn "*xorqi_cc_ext_1"
!   [(set (reg 17)
! 	(compare
  	  (xor:SI
  	    (zero_extract:SI
  	      (match_operand 1 "ext_register_operand" "0")
***************
*** 5957,5966 ****
  	(xor:SI 
  	  (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8))
  	  (match_dup 2)))]
!   ""
    "xor{b}\\t{%2, %h0|%h0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
  
  ;; Negation instructions
  
--- 6032,6061 ----
  	(xor:SI 
  	  (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8))
  	  (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)"
    "xor{b}\\t{%2, %h0|%h0, %2}"
    [(set_attr "type" "alu")
     (set_attr "mode" "QI")])
+ 
+ (define_expand "xorqi_cc_ext_1"
+   [(parallel [
+      (set (reg:CCNO 17)
+ 	  (compare:CCNO
+ 	    (xor:SI
+ 	      (zero_extract:SI
+ 		(match_operand 1 "ext_register_operand" "")
+ 		(const_int 8)
+ 		(const_int 8))
+ 	      (match_operand:QI 2 "general_operand" ""))
+ 	    (const_int 0)))
+      (set (zero_extract:SI (match_operand 0 "ext_register_operand" "")
+ 			   (const_int 8)
+ 			   (const_int 8))
+ 	  (xor:SI 
+ 	    (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8))
+ 	    (match_dup 2)))])]
+   ""
+   "")
  
  ;; Negation instructions
  
***************
*** 6810,6816 ****
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(ashift:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
    "*
  {
--- 6905,6911 ----
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(ashift:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
    "*
  {
***************
*** 6939,6945 ****
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(ashift:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
    "*
  {
--- 7034,7040 ----
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(ashift:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
    "*
  {
***************
*** 7106,7112 ****
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
  	(ashift:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
    "*
  {
--- 7201,7207 ----
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
  	(ashift:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
    "*
  {
***************
*** 7576,7582 ****
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "shr{l}\\t%0"
--- 7671,7677 ----
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "shr{l}\\t%0"
***************
*** 7597,7603 ****
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "@
     shr{l}\\t{%2, %0|%0, %2}"
--- 7692,7698 ----
  	  (const_int 0)))
     (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "@
     shr{l}\\t{%2, %0|%0, %2}"
***************
*** 7649,7655 ****
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "shr{w}\\t%0"
--- 7744,7750 ----
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "shr{w}\\t%0"
***************
*** 7670,7676 ****
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "@
     shr{w}\\t{%2, %0|%0, %2}"
--- 7765,7771 ----
  	  (const_int 0)))
     (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:HI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
    "@
     shr{w}\\t{%2, %0|%0, %2}"
***************
*** 7722,7728 ****
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
  	(lshiftrt:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
     && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
    "shr{b}\\t%0"
--- 7817,7823 ----
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
  	(lshiftrt:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
     && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
    "shr{b}\\t%0"
***************
*** 7743,7749 ****
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
  	(lshiftrt:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCNOmode)
     && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
    "shr{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "ishift")
--- 7838,7844 ----
  	  (const_int 0)))
     (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
  	(lshiftrt:QI (match_dup 1) (match_dup 2)))]
!   "ix86_match_ccmode (insn, CCGOCmode)
     && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
    "shr{b}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "ishift")
***************
*** 8132,8138 ****
  
  (define_insn "*setcc_1"
    [(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
! 	(match_operator:QI 1 "no_comparison_operator"
  	  [(reg 17) (const_int 0)]))]
    ""
    "set%C1\\t%0"
--- 8227,8233 ----
  
  (define_insn "*setcc_1"
    [(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
! 	(match_operator:QI 1 "ix86_comparison_operator"
  	  [(reg 17) (const_int 0)]))]
    ""
    "set%C1\\t%0"
***************
*** 8141,8170 ****
  
  (define_insn "*setcc_2"
    [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
! 	(match_operator:QI 1 "no_comparison_operator"
  	  [(reg 17) (const_int 0)]))]
    ""
    "set%C1\\t%0"
    [(set_attr "type" "setcc")
     (set_attr "mode" "QI")])
  
- (define_insn "*setcc_3"
-   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
- 	(match_operator:QI 1 "uno_comparison_operator"
- 	  [(reg:CC 17) (const_int 0)]))]
-   ""
-   "set%C1\\t%0"
-   [(set_attr "type" "setcc")
-    (set_attr "mode" "QI")])
- 
- (define_insn "setcc_4"
-   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
- 	(match_operator:QI 1 "uno_comparison_operator"
- 	  [(reg:CC 17) (const_int 0)]))]
-   ""
-   "set%C1\\t%0"
-   [(set_attr "type" "setcc")
-    (set_attr "mode" "QI")])
  
  ;; Basic conditional jump instructions.
  ;; We ignore the overflow flag for signed branch instructions.
--- 8236,8248 ----
  
  (define_insn "*setcc_2"
    [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
! 	(match_operator:QI 1 "ix86_comparison_operator"
  	  [(reg 17) (const_int 0)]))]
    ""
    "set%C1\\t%0"
    [(set_attr "type" "setcc")
     (set_attr "mode" "QI")])
  
  
  ;; Basic conditional jump instructions.
  ;; We ignore the overflow flag for signed branch instructions.
***************
*** 8318,8324 ****
  
  (define_insn "*jcc_1"
    [(set (pc)
! 	(if_then_else (match_operator 1 "no_comparison_operator"
  				      [(reg 17) (const_int 0)])
  		      (label_ref (match_operand 0 "" ""))
  		      (pc)))]
--- 8396,8402 ----
  
  (define_insn "*jcc_1"
    [(set (pc)
! 	(if_then_else (match_operator 1 "ix86_comparison_operator"
  				      [(reg 17) (const_int 0)])
  		      (label_ref (match_operand 0 "" ""))
  		      (pc)))]
***************
*** 8335,8341 ****
  
  (define_insn "*jcc_2"
    [(set (pc)
! 	(if_then_else (match_operator 1 "no_comparison_operator"
  				      [(reg 17) (const_int 0)])
  		      (pc)
  		      (label_ref (match_operand 0 "" ""))))]
--- 8413,8419 ----
  
  (define_insn "*jcc_2"
    [(set (pc)
! 	(if_then_else (match_operator 1 "ix86_comparison_operator"
  				      [(reg 17) (const_int 0)])
  		      (pc)
  		      (label_ref (match_operand 0 "" ""))))]
***************
*** 8350,8389 ****
  	     (const_int 0)
  	     (const_int 1)))])
  
- (define_insn "*jcc_3"
-   [(set (pc)
- 	(if_then_else (match_operator 1 "uno_comparison_operator"
- 				      [(reg:CC 17) (const_int 0)])
- 		      (label_ref (match_operand 0 "" ""))
- 		      (pc)))]
-   ""
-   "j%C1\\t%l0"
-   [(set_attr "type" "ibr")
-    (set (attr "prefix_0f")
- 	   (if_then_else (and (ge (minus (match_dup 0) (pc))
- 				  (const_int -128))
- 			      (lt (minus (match_dup 0) (pc))
- 				  (const_int 124)))
- 	     (const_int 0)
- 	     (const_int 1)))])
- 
- (define_insn "*jcc_4"
-   [(set (pc)
- 	(if_then_else (match_operator 1 "uno_comparison_operator"
- 				      [(reg:CC 17) (const_int 0)])
- 		      (pc)
- 		      (label_ref (match_operand 0 "" ""))))]
-   ""
-   "j%c1\\t%l0"
-   [(set_attr "type" "ibr")
-    (set (attr "prefix_0f")
- 	   (if_then_else (and (ge (minus (match_dup 0) (pc))
- 				  (const_int -128))
- 			      (lt (minus (match_dup 0) (pc))
- 				  (const_int 124)))
- 	     (const_int 0)
- 	     (const_int 1)))])
- 
  ;; Define combination compare-and-branch fp compare instructions to use
  ;; during early optimization.  Splitting the operation apart early makes
  ;; for bad code when we want to reverse the operation.
--- 8428,8433 ----
***************
*** 10484,10490 ****
  
  (define_insn "*movsicc_noc"
    [(set (match_operand:SI 0 "register_operand" "=r,r")
! 	(if_then_else:SI (match_operator 1 "no_comparison_operator" 
  				[(reg 17) (const_int 0)])
  		      (match_operand:SI 2 "nonimmediate_operand" "rm,0")
  		      (match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
--- 10535,10541 ----
  
  (define_insn "*movsicc_noc"
    [(set (match_operand:SI 0 "register_operand" "=r,r")
! 	(if_then_else:SI (match_operator 1 "ix86_comparison_operator" 
  				[(reg 17) (const_int 0)])
  		      (match_operand:SI 2 "nonimmediate_operand" "rm,0")
  		      (match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
***************
*** 10496,10515 ****
    [(set_attr "type" "icmov")
     (set_attr "mode" "SI")])
  
- (define_insn "*movsicc_c"
-   [(set (match_operand:SI 0 "register_operand" "=r,r")
- 	(if_then_else:SI (match_operator 1 "uno_comparison_operator" 
- 				[(reg:CC 17) (const_int 0)])
- 		      (match_operand:SI 2 "nonimmediate_operand" "rm,0")
- 		      (match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
-   "TARGET_CMOVE
-    && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
-   "@
-    cmov%C1\\t{%2, %0|%0, %2}
-    cmov%c1\\t{%3, %0|%0, %3}"
-   [(set_attr "type" "icmov")
-    (set_attr "mode" "SI")])
- 
  (define_expand "movhicc"
    [(set (match_operand:HI 0 "register_operand" "")
  	(if_then_else:HI (match_operand 1 "comparison_operator" "")
--- 10547,10552 ----
***************
*** 10520,10526 ****
  
  (define_insn "*movhicc_noc"
    [(set (match_operand:HI 0 "register_operand" "=r,r")
! 	(if_then_else:HI (match_operator 1 "no_comparison_operator" 
  				[(reg 17) (const_int 0)])
  		      (match_operand:HI 2 "nonimmediate_operand" "rm,0")
  		      (match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
--- 10557,10563 ----
  
  (define_insn "*movhicc_noc"
    [(set (match_operand:HI 0 "register_operand" "=r,r")
! 	(if_then_else:HI (match_operator 1 "ix86_comparison_operator" 
  				[(reg 17) (const_int 0)])
  		      (match_operand:HI 2 "nonimmediate_operand" "rm,0")
  		      (match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
***************
*** 10532,10551 ****
    [(set_attr "type" "icmov")
     (set_attr "mode" "HI")])
  
- (define_insn "*movhicc_c"
-   [(set (match_operand:HI 0 "register_operand" "=r,r")
- 	(if_then_else:HI (match_operator 1 "uno_comparison_operator" 
- 				[(reg:CC 17) (const_int 0)])
- 		      (match_operand:HI 2 "nonimmediate_operand" "rm,0")
- 		      (match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
-   "TARGET_CMOVE
-    && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
-   "@
-    cmov%C1\\t{%2, %0|%0, %2}
-    cmov%c1\\t{%3, %0|%0, %3}"
-   [(set_attr "type" "icmov")
-    (set_attr "mode" "HI")])
- 
  (define_expand "movsfcc"
    [(set (match_operand:SF 0 "register_operand" "")
  	(if_then_else:SF (match_operand 1 "comparison_operator" "")
--- 10569,10574 ----

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