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patch: constraints in arm.md
- To: rearnshaw at cambridge dot arm dot com, Nick Clifton <nickc at cygnus dot com>
- Subject: patch: constraints in arm.md
- From: Aldy Hernandez <aldyh at redhat dot com>
- Date: Fri, 28 Jul 2000 08:15:13 -0700
- Cc: gcc-patches at gcc dot gnu dot org
Hi Richard and Nick.
I've been doing some work on the Arm port and I've started to clean up
a few things.
The following patch does two things.
First, it removes the constraints from the "call_value" expander,
since constraints are ignored in define_expand anyhow, and they
probably just confuse the casual reader. (There are a few other
expanders with constraints. I will clean those up in a subsequent
patch).
And lastly (and most importantly), I have split the "=rf" constraints
in all the *call_value_??? patterns to "=r,f". Constraints should
only be munged up together, if there is a register class that is the
union of the alternatives (in this case something like
FPU_OR_GENERAL_REGS).
The code has thus far worked when compiling code with -mhard-float,
but this is purely coincidental. find_reloads() finds the biggest
subunion that contains both register classes ("r" and "f") when
constraints are joined. In this case, it chooses ALL_REGS which
coincidentally is defined to be 0x2FFFFFF: the union of FPU_REGS and
GENERAL_REGS!
This approach is bound to break something if we ever add any more
registers that are not in the FPU + GENERAL union.
One option is to add an FPU_OR_GENERAL_REGS register class. That
would make the code clearer.
However, aside from the obvious (that enum cases cannot be numerically
duplicated), having an extra register class is bound to cause problems
later on, as more register sets become available in future Arm
variants-- reload might start choosing this new register class when we
don't want to.
Thus the reason for the patch below.
I have verified it worked with a full build of arm-elf with all it's
MULTILIBS (yeah, that took forever).
Ok to install?
Aldy
2000-07-27 Aldy Hernandez <aldyh@redhat.com>
* gcc/config/arm/arm.md ("call_value"): removed constraints.
Constraints are ignored in expanders.
(*call_value_reg): split =rf into various constraints.
(*call_value_mem): same
(*call_value_symbol): same
(*sibcall_value_insn): same
Index: arm.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/arm.md,v
retrieving revision 1.52
diff -u -r1.52 arm.md
--- arm.md 2000/07/03 18:02:13 1.52
+++ arm.md 2000/07/28 07:55:18
@@ -5936,9 +5936,9 @@
)
(define_expand "call_value"
- [(parallel [(set (match_operand 0 "" "=rf")
- (call (match_operand 1 "memory_operand" "m")
- (match_operand 2 "general_operand" "g")))
+ [(parallel [(set (match_operand 0 "" "")
+ (call (match_operand 1 "memory_operand" "")
+ (match_operand 2 "general_operand" "")))
(use (match_operand 3 "" ""))
(clobber (reg:SI 14))])]
"TARGET_EITHER"
@@ -5958,8 +5958,8 @@
)
(define_insn "*call_value_reg"
- [(set (match_operand 0 "" "=rf")
- (call (mem:SI (match_operand:SI 1 "s_register_operand" "r"))
+ [(set (match_operand 0 "" "=r,f")
+ (call (mem:SI (match_operand:SI 1 "s_register_operand" "r,r"))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
(clobber (reg:SI 14))]
@@ -5972,8 +5972,8 @@
)
(define_insn "*call_value_mem"
- [(set (match_operand 0 "" "=rf")
- (call (mem:SI (match_operand:SI 1 "memory_operand" "m"))
+ [(set (match_operand 0 "" "=r,f")
+ (call (mem:SI (match_operand:SI 1 "memory_operand" "m,m"))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
(clobber (reg:SI 14))]
@@ -6004,8 +6004,8 @@
)
(define_insn "*call_value_symbol"
- [(set (match_operand 0 "s_register_operand" "=rf")
- (call (mem:SI (match_operand:SI 1 "" "X"))
+ [(set (match_operand 0 "s_register_operand" "=r,f")
+ (call (mem:SI (match_operand:SI 1 "" "X,X"))
(match_operand:SI 2 "" "")))
(use (match_operand 3 "" ""))
(clobber (reg:SI 14))]
@@ -6099,8 +6099,8 @@
)
(define_insn "*sibcall_value_insn"
- [(set (match_operand 0 "s_register_operand" "=rf")
- (call (mem:SI (match_operand:SI 1 "" "X"))
+ [(set (match_operand 0 "s_register_operand" "=r,f")
+ (call (mem:SI (match_operand:SI 1 "" "X,X"))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))]
"TARGET_ARM && GET_CODE (operands[1]) == SYMBOL_REF"