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ia64 varargs vs ssa
- To: gcc-patches at gcc dot gnu dot org
- Subject: ia64 varargs vs ssa
- From: Richard Henderson <rth at cygnus dot com>
- Date: Wed, 14 Jun 2000 14:11:31 -0700
Two problems here. First, a typo in conflict_graph_compute
resulted in a segv when processing REG_INC notes. Second,
there were REG_INC notes.
Post-inc memory references may not be generated before flow1.
r~
* conflict.c (conflict_graph_compute): Don't look for REG_INC.
* config/ia64/ia64.c (ia64_setup_incoming_varargs): Don't emit
auto-inc code.
Index: conflict.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/conflict.c,v
retrieving revision 1.5
diff -c -p -d -r1.5 conflict.c
*** conflict.c 2000/05/19 22:27:27 1.5
--- conflict.c 2000/06/14 21:02:45
*************** conflict_graph_compute (regs, p)
*** 483,494 ****
we're in SSA form, if a reg is set here it isn't set
anywhere elso, so this insn is where the reg is born. */
CLEAR_REG_SET (born);
! note_stores (PATTERN (insn), mark_reg, (void *) born);
! #ifdef AUTO_INC_DEC
! for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
! if (REG_NOTE_KIND (link) == REG_INC)
! mark_reg (XEXP (link, 0), NULL_RTX, NULL);
! #endif
AND_REG_SET (born, regs);
/* Regs born here were not live before this insn. */
--- 483,489 ----
we're in SSA form, if a reg is set here it isn't set
anywhere elso, so this insn is where the reg is born. */
CLEAR_REG_SET (born);
! note_stores (PATTERN (insn), mark_reg, born);
AND_REG_SET (born, regs);
/* Regs born here were not live before this insn. */
Index: config/ia64/ia64.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/ia64/ia64.c,v
retrieving revision 1.24
diff -c -p -d -r1.24 ia64.c
*** ia64.c 2000/06/13 23:36:19 1.24
--- ia64.c 2000/06/14 21:02:46
*************** ia64_setup_incoming_varargs (cum, int_mo
*** 1188,1206 ****
{
int i;
int first_reg = GR_ARG_FIRST + cum.words + offset;
! rtx tmp_reg = gen_rtx_REG (DImode, GR_REG (16));
! rtx tmp_post_inc = gen_rtx_POST_INC (DImode, tmp_reg);
! rtx mem = gen_rtx_MEM (DImode, tmp_post_inc);
! rtx insn;
/* We must emit st8.spill insns instead of st8 because we might
! be saving non-argument registers, and non-argument registers might
! not contain valid values. */
! emit_move_insn (tmp_reg, virtual_incoming_args_rtx);
for (i = first_reg; i < GR_ARG_FIRST + 8; i++)
{
! insn = emit_insn (gen_gr_spill (mem, gen_rtx_REG (DImode, i)));
! REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, tmp_reg, 0);
}
}
*pretend_size = ((MAX_ARGUMENT_SLOTS - cum.words - offset)
--- 1188,1204 ----
{
int i;
int first_reg = GR_ARG_FIRST + cum.words + offset;
! rtx reg1 = gen_reg_rtx (Pmode);
! rtx mem1 = gen_rtx_MEM (DImode, reg1);
/* We must emit st8.spill insns instead of st8 because we might
! be saving non-argument registers, and non-argument registers
! might not contain valid values. */
! emit_move_insn (reg1, virtual_incoming_args_rtx);
for (i = first_reg; i < GR_ARG_FIRST + 8; i++)
{
! emit_insn (gen_gr_spill (mem1, gen_rtx_REG (DImode, i)));
! emit_insn (gen_adddi3 (reg1, reg1, GEN_INT (8)));
}
}
*pretend_size = ((MAX_ARGUMENT_SLOTS - cum.words - offset)