Re: ia32: peephole2

[Jeffrey A Law <law at cygnus dot com>]

  In message <19990809210322.B7803@cygnus.com>you write:
  > The object of the peephole2 is arbitrary rtl->rtl transformations
  > with multiple insns in and multiple insns out.  In addition, a 
  > SCRATCH pattern in the output template matches iff there is a 
  > free register of the proper class.
  > 
  > This is a superset of the functionality provided by the pgcc
  > "riscify" code.
  > 
  > This is dependant on the recently posted resource patch.
  > 
  > 
  > r~
  > 
  > 
  > 	* final.c (peephole): Conditionalize decl on HAVE_peephole.
  > 	(final_scan_insn): Likewise for the invocation of peephole.
  > 	* genconfig.c (main): Look for peephole and peephole2 patterns.
  > 	Emit HAVE_peephole* accordingly.
  > 	* genpeep.c (main): Conditionalize entire output on HAVE_peephole.
  > 	* flags.h (flag_peephole2): Declare.
  > 	* toplev.c: New pass peephole2.  New flag -fpeephole2.
  > 
  > 	* genattrtab.c (main): Count DEFINE_PEEPHOLE2.
  > 	* gencodes.c (main): Likewise.
  > 	* genextract.c (main): Likewise.
  > 	* genoutput.c (main): Likewise.
  > 	* genemit.c (max_operand_1): Look for the max scratch operand.
  > 	(gen_rtx_scratch): New.
  > 	(gen_exp): Use it, and pass on new arg subroutine_type.
  > 	(gen_expand): Take max scratch into account.
  > 	(gen_split): Emit peephole2 functions.
  > 	(output_peephole2_scratch): New.
  > 	(main): Include hard-reg-set.h and resource.h.  Handle peephole2.
  > 	* genrecog.c (routine_type): Add PEEPHOLE2.
  > 	(IS_SPLIT): New.
  > 	(make_insn_sequence): Match outer parallel for peep2.
  > 	(add_to_sequence): New args insn_type and top.  Update all callers.
  > 	Handle toplevel peep2 matching insns.
  > 	(write_subroutine): Handle peep2.
  > 	(write_tree_1): Likewise.
  > 	(write_tree): Likewise.
  > 	(main): Likewise.
  > 	(change_state): New arg afterward.  Update all callers.
  > 	Handle matching separate insns.
  > 	* recog.c (recog_next_insn): New.
  > 	(peephole2_optimize): New.
  > 	* rtl.def (DEFINE_PEEPHOLE2): New.
Looks mostly OK.  If I read the code correctly, it's more general that I had
originally envisioned.  I hadn't thought of allowing N->M splitting using
scratch hard regs or a general peephole mechanism.

I was still looking at a 1->M splitting pass that used scratch hard regs with
a separate pass to do RTL peepholing using resource tracking like reorg with
a sliding window.  But if your stuff does both, more power to it :-)

I wonder how expensive it is to call find_free_register out of the peephole2
pass.  Does this pass run right after reload?  If so we might be able to use
register info on the reload chain to avoid having to call into resource.c.
[ That's assuming we keep the chain info accurate, which I suspect we do not
  at the current time. ]

Have you had any success killing existing peepholes in the x86 backend?  I'm
willing to give this stuff a try on the mn10x ports to get some cross platform
testing once the code is installed.

If it's easy to convert existing peeps we might consider not even keeping the
old peepholer.  There's only a total of 211 peepholes defined across all the
ports:

3	1750a
2	alpha
18	arm/thumb
71	c4x
4	dsp16xx
1	fx80
1	gmicro
4	h8300
8	i860
23	i960
2	m32r
7	m68k
4	mips
11	mn102
5	mn103
6	ns32k
2	pa
5	pyr
1	romp
3	rs6000
12	sh
17	sparc
1	spur


Were there any other open issues from Bernd?


jeff