bit field change

[Richard Henderson <rth at cygnus dot com>]

In the continuing fight to make the recent purge_address change work
correctly in all cases, I've committed the following x86-related fix.


r~


Tue Oct 13 23:03:37 1998  Richard Henderson  <rth@cygnus.com>

        * function.c (purge_addressof_1): Fix typo in inequality: do
        bitfield optimization for equal mode sizes.
        * expmed.c (store_bit_field): Don't take subregs of subregs in
        the movstrict case.  Tidy a potential problem in the multi-word case.
        (extract_bit_field): Likewise.

Index: function.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/function.c,v
retrieving revision 1.50
diff -c -p -d -r1.50 function.c
*** function.c	1998/10/12 10:06:45	1.50
--- function.c	1998/10/14 06:03:06
*************** purge_addressof_1 (loc, insn, force, sto
*** 2885,2891 ****
  
  	  /* Don't even consider working with paradoxical subregs,
  	     or the moral equivalent seen here.  */
! 	  if (size_x < size_sub
  	      && int_mode_for_mode (GET_MODE (sub)) != BLKmode)
  	    {
  	      /* Do a bitfield insertion to mirror what would happen
--- 2885,2891 ----
  
  	  /* Don't even consider working with paradoxical subregs,
  	     or the moral equivalent seen here.  */
! 	  if (size_x <= size_sub
  	      && int_mode_for_mode (GET_MODE (sub)) != BLKmode)
  	    {
  	      /* Do a bitfield insertion to mirror what would happen
Index: expmed.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/expmed.c,v
retrieving revision 1.23
diff -c -p -d -r1.23 expmed.c
*** expmed.c	1998/10/13 15:25:09	1.23
--- expmed.c	1998/10/14 06:03:06
*************** store_bit_field (str_rtx, bitsize, bitnu
*** 347,354 ****
        else
  	{
  	  int icode = movstrict_optab->handlers[(int) fieldmode].insn_code;
! 	  if(! (*insn_operand_predicate[icode][1]) (value, fieldmode))
  	    value = copy_to_mode_reg (fieldmode, value);
  	  emit_insn (GEN_FCN (icode)
  		   (gen_rtx_SUBREG (fieldmode, op0, offset), value));
  	}
--- 347,368 ----
        else
  	{
  	  int icode = movstrict_optab->handlers[(int) fieldmode].insn_code;
! 	  if (! (*insn_operand_predicate[icode][1]) (value, fieldmode))
  	    value = copy_to_mode_reg (fieldmode, value);
+ 
+ 	  if (GET_CODE (op0) == SUBREG)
+ 	    {
+ 	      if (GET_MODE (SUBREG_REG (op0)) == fieldmode
+ 		  || GET_MODE_CLASS (fieldmode) == MODE_INT
+ 		  || GET_MODE_CLASS (fieldmode) == MODE_PARTIAL_INT)
+ 		op0 = SUBREG_REG (op0);
+ 	      else
+ 		/* Else we've got some float mode source being extracted into
+ 		   a different float mode destination -- this combination of
+ 		   subregs results in Severe Tire Damage.  */
+ 		abort ();
+ 	    }
+ 
  	  emit_insn (GEN_FCN (icode)
  		   (gen_rtx_SUBREG (fieldmode, op0, offset), value));
  	}
*************** store_bit_field (str_rtx, bitsize, bitnu
*** 403,414 ****
    /* OFFSET is the number of words or bytes (UNIT says which)
       from STR_RTX to the first word or byte containing part of the field.  */
  
!   if (GET_CODE (op0) == REG)
      {
        if (offset != 0
  	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
! 	op0 = gen_rtx_SUBREG (TYPE_MODE (type_for_size (BITS_PER_WORD, 0)),
! 		       op0, offset);
        offset = 0;
      }
    else
--- 417,432 ----
    /* OFFSET is the number of words or bytes (UNIT says which)
       from STR_RTX to the first word or byte containing part of the field.  */
  
!   if (GET_CODE (op0) != MEM)
      {
        if (offset != 0
  	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
! 	{
! 	  if (GET_CODE (op0) != REG)
! 	    op0 = copy_to_reg (op0);
! 	  op0 = gen_rtx_SUBREG (mode_for_size (BITS_PER_WORD, MODE_INT, 0),
! 		                op0, offset);
! 	}
        offset = 0;
      }
    else
*************** store_bit_field (str_rtx, bitsize, bitnu
*** 539,545 ****
  		{
  		  /* Avoid making subreg of a subreg, or of a mem.  */
  		  if (GET_CODE (value1) != REG)
! 		value1 = copy_to_reg (value1);
  		  value1 = gen_rtx_SUBREG (maxmode, value1, 0);
  		}
  	      else
--- 557,563 ----
  		{
  		  /* Avoid making subreg of a subreg, or of a mem.  */
  		  if (GET_CODE (value1) != REG)
! 		    value1 = copy_to_reg (value1);
  		  value1 = gen_rtx_SUBREG (maxmode, value1, 0);
  		}
  	      else
*************** extract_bit_field (str_rtx, bitsize, bit
*** 1146,1153 ****
      {
        if (offset != 0
  	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
! 	op0 = gen_rtx_SUBREG (mode_for_size (BITS_PER_WORD, MODE_INT, 0),
! 		              op0, offset);
        offset = 0;
      }
    else
--- 1164,1175 ----
      {
        if (offset != 0
  	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
! 	{
! 	  if (GET_CODE (op0) != REG)
! 	    op0 = copy_to_reg (op0);
! 	  op0 = gen_rtx_SUBREG (mode_for_size (BITS_PER_WORD, MODE_INT, 0),
! 		                op0, offset);
! 	}
        offset = 0;
      }
    else