i386.md splits 3

[Jan Hubicka <hubicka at atrey dot karlin dot mff dot cuni dot cz>]

Hi
I've did changes suggested by Richatd. Also I've added ! to sign extending to memory, 
to force gcc do shift in register. Also I've added some new test for REGNOS, to simulate
"A" constraint in split resulting to ctld. 
So hope first part of my patch is getting closer for inclussion.


*** gcc/config/i386/i386.md.orig	Thu Oct  1 18:29:54 1998
--- gcc/config/i386/i386.md	Fri Oct  2 13:49:22 1998
***************
*** 1782,1787 ****
--- 1782,1798 ----
    [(set_attr "type" "integer,memory")
     (set_attr "memory" "*,load")])
  
+ ;; Split the trivial (and common) case of movdi
+ (define_split 
+   [(set (match_operand:DI 0 "general_operand" "or")
+ 	(match_operand:DI 1 "general_operand" "or"))]
+   "!reg_overlap_mentioned_p (operands[0], operands[1])
+    && (reload_completed || reload_in_progress)"
+   [(set (match_dup 3) (match_dup 5))
+    (set (match_dup 4) (match_dup 6))]
+   "split_di (&operands[0], 1, &operands[3], &operands[4]);
+    split_di (&operands[1], 1, &operands[5], &operands[6]);")
+ 
  
  ;;- conversion instructions
  ;;- NONE
***************
*** 2023,2080 ****
  
  (define_insn "zero_extendsidi2"
    [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?m")
! 	(zero_extend:DI (match_operand:SI 1 "register_operand" "0,rm,r")))]
    ""
!   "*
!   {
!   rtx high[2], low[2], xops[4];
! 
!   if (REG_P (operands[0]) && REG_P (operands[1])
!       && REGNO (operands[0]) == REGNO (operands[1]))
!     {
!       operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
!       return AS2 (xor%L0,%0,%0);
!     }
! 
!   split_di (operands, 1, low, high);
!   xops[0] = low[0];
!   xops[1] = operands[1];
!   xops[2] = high[0];
!   xops[3] = const0_rtx;
! 
!   output_asm_insn (AS2 (mov%L0,%1,%0), xops);
!   if (GET_CODE (low[0]) == MEM)
!     output_asm_insn (AS2 (mov%L2,%3,%2), xops);
!   else
!     output_asm_insn (AS2 (xor%L2,%2,%2), xops);
  
!   RET;
! }")
  
  ;;- sign extension instructions
  
  (define_insn "extendsidi2"
!   [(set (match_operand:DI 0 "register_operand" "=r")
! 	(sign_extend:DI (match_operand:SI 1 "register_operand" "0")))]
    ""
!   "*
! {
!   if (REGNO (operands[0]) == 0)
!     {
!       /* This used to be cwtl, but that extends HI to SI somehow.  */
! #ifdef INTEL_SYNTAX
!       return \"cdq\";
! #else
!       return \"cltd\";
! #endif
!     }
  
!   operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
!   output_asm_insn (AS2 (mov%L0,%0,%1), operands);
  
!   operands[0] = GEN_INT (31);
!   return AS2 (sar%L1,%0,%1);
! }")
  
  ;; Note that the i386 programmers' manual says that the opcodes
  ;; are named movsx..., but the assembler on Unix does not accept that.
--- 2034,2087 ----
  
  (define_insn "zero_extendsidi2"
    [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?m")
! 	(zero_extend:DI (match_operand:SI 1 "general_operand" "0,rm,r")))]
    ""
!   "#")
  
! (define_split 
!   [(set (match_operand:DI 0 "nonimmediate_operand" "")
! 	(zero_extend:DI (match_operand:SI 1 "general_operand" "")))]
!   "reload_completed"
!   [(set (match_dup 3) (match_dup 1))
!    (set (match_dup 4) (const_int 0))]
!   "split_di (&operands[0], 1, &operands[3], &operands[4]);")
  
  ;;- sign extension instructions
  
  (define_insn "extendsidi2"
!   [(set (match_operand:DI 0 "nonimmediate_operand" "=A,?r,?Ar,!o")
! 	(sign_extend:DI (match_operand:SI 1 "general_operand" "0,0,mr,r")))]
    ""
!   "#")
  
! ;; When parameter is in register it is better to copy from it to avoid
! ;; dependencies.
! ;; When parameter is in memory, copy it to destination and then again.
! 
! (define_split 
!   [(set (match_operand:DI 0 "nonimmediate_operand" "")
! 	(sign_extend:DI (match_operand:SI 1 "general_operand" "")))]
!   "reload_completed
!    && (!REG_P (operands[0]) || REGNO (operands[0]) != 0
!    || (!optimize_size && ix86_cpu == PROCESSOR_PENTIUM))"
!   [(set (match_dup 3) (match_dup 1))
!    (set (match_dup 4) (match_dup 5))
!    (set (match_dup 4)
!         (ashiftrt:SI (match_dup 4) (const_int 31)))]
!   "split_di (&operands[0], 1, &operands[3], &operands[4]);
!    if (REG_P (operands[1])) operands[5] = operands[1]; else operands[5] = operands[3];")
  
! (define_split 
!   [(set (match_operand:DI 0 "register_operand" "")
! 	(sign_extend:DI (match_operand:SI 1 "general_operand" "")))]
!   "reload_completed
!    && REG_P (operands[0]) && REGNO (operands[0]) == 0
!    && (!REG_P (operands[1]) || REGNO (operands[1]) != 0)
!    && (optimize_size || ix86_cpu!=PROCESSOR_PENTIUM)"
!   [(set (match_dup 3) (match_dup 1))
!    (set (match_dup 4)
!         (ashiftrt:SI (match_dup 3) (const_int 31)))]
!   "split_di (&operands[0], 1, &operands[3], &operands[4]);")
  
  ;; Note that the i386 programmers' manual says that the opcodes
  ;; are named movsx..., but the assembler on Unix does not accept that.
*************** byte_xor_operation:
*** 4850,4855 ****
--- 4857,4871 ----
  
    RET;
  }")
+ 
+ (define_insn "ashrsi3_31"
+   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,d")
+ 	(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,a")
+ 		     (const_int 31)))]
+   "ix86_cpu != PROCESSOR_PENTIUM || optimize_size"
+   "@
+     sar%L0 $31,%0
+     cltd")
  
  (define_insn "ashrsi3"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")