Re: Bug in egcs-1.1 (reduced testcase included)(PPC)

[Jeffrey A Law <law at cygnus dot com>]

  In message <199808101029.DAA06109@cygnus.com>you write:
  > Hi,
  > 
  > on powerpc-unknown-linux-gnu I got the following error with egcs-2.91.53
  > 19980809:
  > 
  > dialog.i: In function `AddButtons':
  > dialog.i:65: internal error--insn does not satisfy its constraints:
  > (insn 324 97 325 (set (reg:SI 0 r0)
  >         (high:SI (symbol_ref:SI ("*.LC2")))) 395 {elf_high} (nil)
  >     (nil))
  > ../../../egcs/gcc/toplev.c:1360: Internal compiler error in function
  > fatal_insn
  > 
  > while compiling the attached code with -O2. -fpic, -fPIC, -O1 or
  > -funroll-all-loops make the error go away.
Thanks.  I think I know what's going on.

Basically we have something like this in the .lreg file:

(insn 293 212 294 (set (reg:SI 169)
        (high:SI (symbol_ref:SI ("*.LC2")))) 395 {elf_high} (nil)
    (expr_list:REG_EQUIV (high:SI (symbol_ref:SI ("*.LC2")))
        (nil)))

(insn 294 293 227 (set (reg:SI 117)
        (lo_sum:SI (reg:SI 169)
            (symbol_ref:SI ("*.LC2")))) 396 {elf_low} (insn_list 293 (nil))
    (expr_list:REG_DEAD (reg:SI 169)
        (expr_list:REG_EQUIV (symbol_ref:SI ("*.LC2"))
            (nil))))

[ ... ]

(insn 100 97 103 (set (mem:SI (plus:SI (reg:SI 1 r1)
                (const_int 12)))
        (reg:SI 117)) 402 {movsi+1} (nil)
    (nil))


reg117 does not get a hard register during local register allocation.

global register allocation/reload note that reg117 is actually equivalent
to (symbol_ref: SI ("*.LC2")) and try to substitute the value into
insn 100:


(insn 100 97 103 (set (mem:SI (plus:SI (reg:SI 1 r1)
                (const_int 12)))
       (symbol_ref:SI ("*.LC2")) 402 {movsi+1} (nil)
    (nil))


This is not a valid insn, but reload knows it can try to reload
the symbol ref into a register immediately before insn 100 to make
a valid insn.

So it creates something like this:

(insn 311 97 312 (set (reg:SI 0 r0)
        (high:SI (symbol_ref:SI ("*.LC2")))) 395 {elf_high} (nil)
    (nil))

(insn 312 311 100 (set (reg:SI 0 r0)
        (lo_sum:SI (reg:SI 0 r0)
            (symbol_ref:SI ("*.LC2")))) -1 (nil)
    (nil))

(insn:HI 100 312 103 (set (mem:SI (plus:SI (reg:SI 1 r1)
                (const_int 12)))
        (reg:SI 0 r0)) 402 {movsi+1} (nil)
    (nil))

insn 311 and insn 312 are created by reload, and thus are never
checked by reload to see if they also need reloads.

If we look at the elf_high and elf_low patterns:

;; Elf specific ways of loading addresses for non-PIC code.
;; The output of this could be r0, but we limit it to base
;; registers, since almost all uses of this will need it
;; in a base register shortly.
(define_insn "elf_high"
  [(set (match_operand:SI 0 "register_operand" "=b")
        (high:SI (match_operand 1 "" "")))]
  "TARGET_ELF && !TARGET_64BIT"
  "{cau|addis} %0,0,%1@ha")

(define_insn "elf_low"
  [(set (match_operand:SI 0 "register_operand" "=r")
        (lo_sum:SI (match_operand:SI 1 "register_operand" "b")
                   (match_operand 2 "" "")))]
   "TARGET_ELF && !TARGET_64BIT"
   "{cal %0,%a2@l(%1)|addi %0,%1,%2@l}")

We see that (reg r0) is not suitable for use as a destination
in the elf_high or as a source in elf_low.  This causes the compiler
to abort later because the constraints do not match.

The way to deal with this problem is to either allow reg0 in those
patterns or to allocate secondary reload reg when copying a symbol_ref
into GENERAL_REGS (well, we should really make a class of r0, then
allocate the secondary reload when copying a symbol_ref into R0_REGS).


I don't know anything about the rs6000/ppc ISA, so I don't know if
there's some real reason why we can't use r0 in those instructions.

If there's no reason why we can't use r0, then the best solution is
to allow r0 -- it's simpler and will generate better code.

Thoughts?

jeff