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Re: Does GCC need a special switch for ADCX/ADOX?
- From: Xi Ruoyao <ryxi at stu dot xidian dot edu dot cn>
- To: noloader at gmail dot com, "gcc-help at gcc dot gnu dot org" <gcc-help at gcc dot gnu dot org>
- Cc: ryxi at stu dot xidian dot edu dot cn
- Date: Mon, 21 Aug 2017 18:14:32 +0800
- Subject: Re: Does GCC need a special switch for ADCX/ADOX?
- Authentication-results: sourceware.org; auth=none
- References: <CAH8yC8kkG2x_oSSPW1QrZ30Ryc314WGT9tCzcQg0i57N3vFS6Q@mail.gmail.com>
On 2017-08-21 04:25 -0400, Jeffrey Walton wrote:
> Does GCC need a special switch for ADCX/ADOX?
On my Core i3 (ivybridge) -march=native is enough to generate ADCQ with
_addcarryx_u64. And according to GCC testsuite, _addcarryx_u64 always
translates to ADCQ on x86-64 since all x86-64 CPU have it:
<http://gcc.gnu.org/viewcvs/gcc/trunk/gcc/testsuite/gcc.target/i386/
adx-addcarryx64-3.c?revision=214860&view=markup>
> I'm working on a 6th gen Core i5 (Skylake). It has ADX cpu features,
> and I compile with -march=native.
>
> I'm having a heck of a time getting GCC to generate the instruction,
> even when using the _addcarryx_u64 instrinsic. I've tried with both
> GCC 6.4 (Fedora 25) and GCC 7.1 (Fedora 26).
> Testing under ICC shows ICC happily generates the adcx or adox. In
> fact, it looks like 2-3 adcx or adox take the place of one
> add/addc/setc sequence.
>
> Does anyone know how to get GCC to generate the adcx or adox instructions?
>
> Thanks in advance.
--
Xi Ruoyao <ryxi@stu.xidian.edu.cn>
School of Aerospace Science and Technology, Xidian University