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Re: RFC: Very long alternative lists for RTL patterns like move


While I haven't done anything with new syntax, I have used spacing, etc. to
put things in a more columnar fashion, to make it easier to see what constraint
goes with the instruction and the alternatives.  Here is what I'm working on
with DImode moves (I need to add full VSX support for the integer types,
SImode/DImode for any VSX system, QImode/HImode only for power9, and so I am
hitting the problem to make sure the constraints/insns/etc. match up).

Do people think this is useful (particularly David), or should we just stay
with the current long format?  Or is there another way using the current syntax
to make it clearer?

Note, I have to return to IEEE 128-bit floating point, so this is likely to go
back on the burner.


;                                                    std    ld     mr
;                                                    li     lis    #
;                                                    stfd   lfd    fmr
;                                                    mfspr  mtspr  nop
;                                                    mftgpr mffgpr mfvsrd mtvsrd
;                                                    xxlxor
(define_insn "*movdi_internal64"
  [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,     r,     r,
                                                     r,     r,     r,
                                                     ?m,    ?*d,   ?*d,
                                                     r,     *h,    *h,
                                                     r,     ?*wg,  r,     ?*wj,
                                                     ?*wi")
        (match_operand:DI 1 "input_operand"         "r,     Y,     r,
                                                     I,     L,     nF,
                                                     d,     m,     d,
                                                     *h,    r,     0,
                                                     *wg,   r,     *wj,   r,
                                                     O"))]
  "TARGET_POWERPC64
   && (gpc_reg_operand (operands[0], DImode)
       || gpc_reg_operand (operands[1], DImode))"
  "@
   std%U0%X0 %1,%0
   ld%U1%X1 %0,%1
   mr %0,%1
   li %0,%1
   lis %0,%v1
   #
   stfd%U0%X0 %1,%0
   lfd%U1%X1 %0,%1
   fmr %0,%1
   mf%1 %0
   mt%0 %1
   nop
   mftgpr %0,%1
   mffgpr %0,%1
   mfvsrd %0,%x1
   mtvsrd %x0,%1
   xxlxor %x0,%x0,%x0"
;                      std        ld      mr
;                      li         lis     #
;                      stfd       lfd     fmr
;                      mfspr      mtspr   nop
;                      mftgpr     mffgpr  mfvsrd mtvsrd
;                      xxlxor
  [(set_attr "type"   "store,     load,   *,
                       *,         *,      *,
                       fpstore,   fpload, fp,
                       mfjmpr,    mtjmpr, *,
                       mftgpr,    mffgpr, mftgpr, mffgpr,
                       vecsimple")
   (set_attr "length" "4,         4,      4,
                       4,         4,      20,
                       4,         4,      4,
                       4,         4,      4,
                       4,         4,      4,       4,
                       4")])

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797


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