This is the mail archive of the
mailing list for the GCC project.
Re: Is there any other optimization for memory?
- From: Ian Lance Taylor <iant at google dot com>
- To: Parmenides <mobile dot parmenides at gmail dot com>
- Cc: Gcc mailing list <gcc-help at gcc dot gnu dot org>
- Date: Wed, 13 Jul 2011 16:13:10 -0700
- Subject: Re: Is there any other optimization for memory?
- References: <CAOXENUhL5=Qg568Sk=pK=TEF0uwbb7xjbwNj7sGfZs2F01fxEw@mail.gmail.com>
Parmenides <firstname.lastname@example.org> writes:
> Gcc manual describes "memory" clobber in a inline assembly as follows:
> If your assembler instructions access memory in an unpredictable
> fashion, add `memory' to the list of clobbered registers. This will
> cause GCC to not keep memory values cached in registers across the
> assembler instruction and not optimize stores or loads to that memory.
> I have two questions about it.
> 1. "This will cause GCC to not keep memory values cached in registers
> ***across*** the assembler instruction"
> What's the exact meaning of "across"? I think that the gcc will reload
> a memory value into a register ***after*** the assembler instruction.
> Is that the case?
That is the case. Perhaps this is a language issue as I think the
English is clear. GCC will not keep a memory value cached in a register
from before to asm instruction to after the asm instruction--or, in
other words, across the instruction.
> 2. "and not optimize stores or loads to that memory"
> Except caching memory values in registers, is there any other
> optimizaiton for stores or loads to memory?
Not in this case, I think it's just another way of saying the same