This is the mail archive of the gcc-help@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Can a float volatile asm be used as optimization barrier?


>
> As is documented in the gcc manual, "asm
> volatile" means that the instruction has side effects which are not
> described in the outputs, and thus may not be deleted.

I think it necessary to get my feet wet for side effects. I try to
modify an example in gcc manual to make it adapt to IA32.

#define add(new)                                \
     ({ int __old;                              \
          asm ("addl %1, %0"                    \
               : "=g" (__old) : "g" (new));     \
          __old;                                \
     })

void tst(void)
{
     int x = 15;
     add(x);
}

Then, I invoked gcc to compile it :
gcc -S -O tst.c

and, get the following asm code :
tst:
        pushl   %ebp
        movl    %esp, %ebp
        popl    %ebp
        ret

It seems that the asm instruction has been considered having no side
effects and deleted from tst(), because the __old is declared as
output operand and it is not used later.

But according to gcc manual, "if an asm has output operands, GCC
assumes for optimization purposes the instruction has no side effects
except to change the output operands."

In the above example, it is obvious that the asm has an output
operand. But, in terms of the inline instruction, namely the addl, the
output operand is **changed** indeed. Why does the gcc consider the
asm having no side effects?


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]