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Re: how to modify sign-extend instruction generation
- From: Ian Lance Taylor <iant at google dot com>
- To: ååå <wuxb45 at gmail dot com>
- Cc: gcc-help at gcc dot gnu dot org
- Date: Mon, 13 Jun 2011 14:04:52 -0700
- Subject: Re: how to modify sign-extend instruction generation
- References: <BANLkTimkaOy1tL+gyL_Gp+0avZCJuj-fvg@mail.gmail.com>
ååå <wuxb45@gmail.com> writes:
> I'm now modifying the gcc's md file, for a mips(el) target. gcc src's
> version is 4.6.0.
>
> I want to modify the sign-extend insn generation.
>
> originally, mips use "lb"/"lh" instruction to sign-extend a byte/half.
>
> but in my target CPU it doesn't has "lb" and "lh", it only support
> "lbu" and "lhu". so I have to generate such instructions to implement
> a sign-ext.
>
> e.g.
>
> lb %0,%1
>
> become:
>
> lbu %0,%1
> srl %0,%0,24
> sra %0,%0,24
>
> similarly:
>
> lh %0,%1
>
> become:
>
> lhu %0,%1
> srl %0,%0,16
> sra %0,%0,16
>
> But, In original "md" file, two of these is a single pattern, it use
> macro to generate lb/lh instruction:
>
> "l<SHORT:size>"
>
> <SHORT:size> may be "b" or "h" --> "lb" or "lh"
>
> but I want to get "24" from "b" ; get "16" form "h". How can I achieve this?
Don't use a macro. Split the insn apart into separate insns.
Ian