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Re: MIPS inline assembly and floating point
- From: Ian Lance Taylor <iant at google dot com>
- To: George Caragea <george at cs dot umd dot edu>
- Cc: gcc-help at gcc dot gnu dot org
- Date: Thu, 01 Oct 2009 23:16:04 -0700
- Subject: Re: MIPS inline assembly and floating point
- References: <4AC528BD.50909@cs.umd.edu>
George Caragea <george@cs.umd.edu> writes:
> I am using a MIPS-variant compiler based on gcc-4.0.2. I am trying to
> use an inline assembly instruction in the code to use a special load
> instruction 'lwbufc1' that our prototype system supports. The syntax
> and semantics of the lwbufc1 are the same as lwc1 (loading from memory
> into a fp register), the only difference is in some caching
> functionality.
>
> The C code looks like this:
>
> int i,j;
> float A[100];
> float val,x;
> asm volatile ("lwbufc1 %0, %1" : "=f" (val) : "m" (A[i]));
> x = val * A[j];
>
> However, when I compile it, the compiler correctly loads the value
> from A[i] into val, but then attempts to convert val from fixed-point
> to floating-point, using a cvt.s.w instruction.
When I convert your example into something that compiles, I do not see
a cvt.s.w instruction. This is with the mainline development version
of gcc. It is possible that some bug has been fixed since gcc 4.0.2,
although I didn't see any obvious change in the compiler after a quick
look.
Ian